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Journal ArticleDOI

R3TOS: A Novel Reliable Reconfigurable Real-Time Operating System for Highly Adaptive, Efficient, and Dependable Computing on FPGAs

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TLDR
R3TOS provides systematic OS support for FPGAs, allowing the exploitation of some of the most advanced capabilities of FPGA technology by inexperienced users, with the dual objective of improving computation density and circumventing damaged resources on theFPGA.
Abstract
Despite the clear potential of FPGAs to push the current power wall beyond what is possible with general-purpose processors, as well as to meet ever more exigent reliability requirements, the lack of standard tools and interfaces to develop reconfigurable applications limits FPGAs' user base and makes their programming not productive. R3TOS is our contribution to tackle this problem. It provides systematic OS support for FPGAs, allowing the exploitation of some of the most advanced capabilities of FPGA technology by inexperienced users. What makes R3TOS special is its nonconventional way of exploiting on-chip resources: These are used indistinguishably for carrying out either computation or communication tasks at different times. Indeed, R3TOS does not rely on any static infrastructure apart from its own core circuitry, which is constrained to a specific region within the FPGA where it is implemented. Thus, the rest of the device is kept free of obstacles, with the spare resources ready to be used as and whenever needed. At runtime, the hardware tasks are scheduled and allocated with the dual objective of improving computation density and circumventing damaged resources on the FPGA.

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Citations
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Journal ArticleDOI

Synchronization of faulty processors in coarse-grained TMR protected partially reconfigurable FPGA designs

TL;DR: Four different synchronization approaches for soft core processors, which balance differently the trade-off between synchronization speed and hardware overhead are posed.
Journal ArticleDOI

Operating System Concepts for Reconfigurable Computing

TL;DR: The purpose of this article is to identify and summarize common patterns among those systems that can be seen as de facto standard and open problems, not covered by these already available systems, are identified.
Journal ArticleDOI

Microkernel Architecture and Hardware Abstraction Layer of a Reliable Reconfigurable Real-Time Operating System (R3TOS)

TL;DR: The Reliable Reconfigurable Real-Time Operating System (R3TOS) provides OS-like support for partially reconfigurable FPGAs and presents a set of novel circuits and mechanisms to overcome the limitations and exploit the opportunities of Xilinx reconfiguring technology in the scope of hardware multitasking and dependability.
Proceedings ArticleDOI

A dynamic partial reconfigurable overlay concept for PYNQ

TL;DR: An extension of the Xilinx Python package ‘pynq’ to ease the usage of partial reconfigurable bitstreams and enables overlay developers to offer overlays which manage thepartial reconfiguration transparent to the Python programmer.
Journal ArticleDOI

R3TOS-Based Autonomous Fault-Tolerant Systems

TL;DR: An R3TOS-based inverter controller of a real-world railway traction system that is proven to recover from most of the errors injected without requiring any human intervention is presented.
References
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Journal ArticleDOI

Software radios: Survey, critical evaluation and future directions

TL;DR: A layered topology-oriented design approach encapsulated in a canonical open architecture software radio model is presented, which provides a unified mathematical framework for quantitative analysis of algorithm structures, host architectures, and system performance for CAD.
Book ChapterDOI

A static task partitioning approach for heterogeneous systems using OpenCL

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Book ChapterDOI

A Virtual Hardware Operating System for the Xilinx XC6200

TL;DR: The issues involved in presenting a software-oriented user with a larger virtual hardware resource that is implemented using smaller physical FPGA hardware are explored.
Book ChapterDOI

A Self-reconfiguring Platform

TL;DR: In this article, a self-reconfiguring platform for FPGAs to dynamically reconfigure itself under the control of an embedded microprocessor has been reported and implemented on Xilinx Virtex IItm and Virtex II Protm devices.
Proceedings ArticleDOI

A unified hardware/software runtime environment for FPGA-based reconfigurable computers using BORPH

TL;DR: This paper presents a hw/sw codesign methodology based on BORPH, an operating system designed for FPGA-based reconfigurable computers (RC's).
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