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Journal ArticleDOI

Toward Increasing the Difficulty of Reverse Engineering of RSFQ Circuits

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TLDR
Camouflaging superconducting electronics, specifically, rapid single flux quantum (RSFQ) technology, from reverse engineering requires near-zero area, power, and performance overhead even when 100% of the sensitive parts of the processor are camouflaged.
Abstract
Integrated circuit (IC) camouflaging is a defense to defeat image-based reverse engineering. The security of CMOS ICs has been extensively studied and camouflage techniques have been developed. A camouflaging method is introduced here to protect superconducting electronics, specifically, rapid single flux quantum (RSFQ) technology, from reverse engineering. RSFQ camouflaged units have been developed by applying the structural similarity of RSFQ standard cells. A defense using camouflaged RSFQ cells combined with obfuscating the temporal distribution of inputs to the IC increases the attacker's effort to decamouflage. The approach establishes the complexity class of RSFQ decamouflaging and a model checker is applied to evaluate the strength of the defenses. These techniques have been evaluated on ISCAS’85 combinational benchmarks and the controllers of the OpenSPARC T1 microprocessor. A dummy Josephson junction fabrication process adds two additional mask steps that increase the cost overhead. Camouflaging 100% of the benchmark circuits results in an area and power overhead of almost 40%. In the case of the OpenSPARC processor, the approach requires near-zero area, power, and performance overhead even when 100% of the sensitive parts of the processor are camouflaged.

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Citations
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Digital Design And Computer Architecture

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Journal ArticleDOI

Bridge-type fault current limiter and hybrid breaker for HVDC grids applications

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Journal ArticleDOI

An Efficient Pipelined Architecture for Superconducting Single Flux Quantum Logic Circuits Utilizing Dual Clocks

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Controllable reactor based hybrid HVDC breaker

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References
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Journal ArticleDOI

RSFQ logic/memory family: a new Josephson-junction technology for sub-terahertz-clock-frequency digital systems

TL;DR: In this paper, the rapid single-flux-quantum (RSFQ) circuit family is reviewed and a discussion of possible future developments and applications of this novel, ultrafast digital technology is discussed.
Journal ArticleDOI

The future of microprocessors

TL;DR: Energy efficiency is the new fundamental limiter of processor performance, way beyond numbers of processors.
Journal ArticleDOI

NUSMV: a new symbolic model checker

TL;DR: A new symbolic model checker, called NuSMV, developed as part of a joint project between CMU and IRST, and a detailed description of its functionalities, architecture, and implementation is described.
Proceedings ArticleDOI

EPIC: ending piracy of integrated circuits

TL;DR: A novel comprehensive technique to end piracy of integrated circuits (EPIC), which requires that every chip be activated with an external key, which can only be generated by the holder of IP rights, and cannot be duplicated.
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