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Patent

Wireless communication unit, integrated circuit comprising a voltage controlled oscillator and method of operation therefor

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TLDR
In this paper, a phase-locked loop (PLL) circuit with a tuning port for controlling a frequency of a signal output from the VCO is described. But the number of switches required to switch in one or more varactors associated with the tuning port is fixed.
Abstract
A wireless communication unit (400) comprises a frequency generation circuit (423) employing a phase locked loop (PLL) circuit comprising a voltage controlled oscillator (VCO) (1100) having a modulation port for directly modulating a signal output from the VCO. The VCO is operably coupled to at least one switch (1121, 1122) and a capacitor bank (1105) comprising one or more varactors. A controller (1130) is arranged to switch-in one or more varactors associated with the modulation port of the PLL circuit the number of switched-in varactors varying proportionally to a piecewise approximation of 1/f2. This allows the modulation port gain KmOd of the VCO to remain substantially constant when the frequency varies. In addition, or alternatively, the PLL circuit may comprise a VCO having a tuning port for controlling a frequency of a signal output from the VCO. The controller (1130) is arranged to switch in one or more varactors associated with the tuning port of the PLL circuit, the number of switched-in varactors varying proportionally to a piecewise approximation of 1/f3. This allows the ratio Kv/N to remain substantially constant when the frequency varies, Kv being the turning port gain of the VCO and N is a division ratio of a divider (305) in the feedback loop of the PLL.

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Citations
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References
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Analog open-loop VCO calibration method

TL;DR: An analog open-loop voltage controlled oscillator (VCO) calibration circuit and method for selecting the frequency of the VCO for a phase locked loop (PLL) is presented in this article.
Proceedings ArticleDOI

A single-chip CMOS Bluetooth transceiver with 1.5MHz IF and direct modulation transmitter

TL;DR: In this paper, a single-chip Bluetooth transceiver in 018/spl mu/m CMOS integrates a direct VCO modulation transmitter and 15MHz-IF receiver to reduce power consumption and cost.
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Fractional-N synthesizer having modulation spur compensation

TL;DR: In this paper, the authors proposed a synthesis with spur compensation, which utilizes fractional division in the synthesizer loop to compensate the spurs when the fractional numerator N ¸ 0.
Proceedings ArticleDOI

GSM 900/DCS 1800 fractional-N modulator with two-point-modulation

TL;DR: Measurements of the spectrum for the G SM modulated signal and of the demodulated signal show that the strict demands of the GSM specification can be met.
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Multiple accumulator fractional N synthesis with series recombination

TL;DR: A fractional-N type frequency synthesizer (700) for use in a radiotelephone (901) is described in this article, where the synthesizer utilizes multiple latched accumulators within an accumulator network, to perform multiple integrals of an input signal.