Showing papers on "Digital signal published in 1991"

Integrated radio satellite response system and method

Abstract: A radio response system including a broadcast station, a satellite relay, a processing center, and a plurality of user terminals. Each user terminal has a broadcast receiver, a communications interface device, a controller and a data transmitter. The broadcast station broadcasts a program signal. The broadcast receiver receives the program signal. The communications interface device communicates the program signal to a user. The controller generates a user-data signal from identification information transmitted in connection with the program signal and/or timing, location and frequency information needed for identifying the program signal, and a user-input signal generated in response to the program signal. The data transmitter transmits the user-data signal at a carrier frequency as a transmitted-data signal. The satellite relays the user-data signal to the processing center.

Electronic still video camera with direct personal computer (pc) compatible digital format output

Abstract: An electronic still camera comprising a lens, shutter, and exposure control system, a focus and range control circuit, a solid state imaging device incorporating a Charge Coupled Device (CCD) through which an image is focused, a digital control unit through which timing and control of an image for electronic processing is accomplished, an Analog-to-Digital (A/D) converter circuit to convert the analog picture signals into their digital equivalents, a pixel buffer for collecting a complete row of an image's digital equivalent, a frame buffer for collecting all rows of an image's digital equivalent, and a selectively adjustable digital image compression and decompression algorithm that compresses the size of a digital image and selectively formats the compressed digital image to a compatible format for either the IBM Personal Computer and related architectures or the Apple Macintosh PC architecture as selected by the operator so that the digital image can be directly read into most word processing, desktop publishing, and data base software packages including means for executing the appropriate selected decompression algorithm; and a memory input/output interface that provides both temporary storage of the digital image and controls the transmission and interface with a standard Personal Computer (PC) memory storage device such as a digital diskette. The digital diskette is removably inserted into the housing of the camera prior to use in recording digital image data.

Synchronous spread-spectrum communications system and method

Abstract: A spread spectrum communications system for use over a communication channel, including a transmitter-generic-chip-code generator (101), a transmitter-message-chip-code generator (102), an EXCLUSIVE-OR gate (103), a combiner (104), a transmitter (107), a receiver-generic-chip-code generator (121), a receiver-generic mixer (123), a generic-bandpass filter (125), a receiver-message-chip-code generator (122), a receiver-message mixer (124), a message-bandpass filter (126), and a synchronous detector (139). The transmitter-generic-chip-code generator (101) generates a generic-chip-code signal and the transmitter-message-chip-code generator (102) generates a message-chip-code signal. The EXCLUSIVE-OR gate (103) spread-spectrum processes message data with the message-chip-code signal to generate a spread-spectrum signal. The combiner (104) combines the generic-chip-code signal with the spread-spectrum signal. The transmitter (107) transmits the combined generic-chip-code signal and spread-spectrum signal, on a carrier signal (108) over the communications channel as a spread-spectrum-communications signal. The receiver-generic-chip-code generator (121) generates a replica of the generic-chip-code signal. The generic mixer (123) recovers the carrier signal from the spread-spectrum-communications signal. The receiver-message-chip-code generator (122) generates a replica of the message-chip-code signal. The receiver-message mixer (124) despreads the spread-spectrum-communications signal as a modulated-data signal. The tracking and acquisition circuit (121) uses the recovered carrier signal for synchronizing the replicas of the generic-chip-code signal to the recovered carrier signal. The synchronous detector (139) synchronously demodulates the modulated-data signal as received data.

Method and apparatus for ECG signal analysis and cardiac arrhythmia detection

Abstract: A method and apparatus for arrhythmia detection comprise steps and means for acquiring at least one continuous analog signal produced by an ECG system, producing at least one digital signal based on the analog signal, producing a plurality of scalar signals from the at least one digital signal, extracting features from the scalar signal, and plotting the extracted features in a feature space having a number of dimensions equal to the number of extracted features. A normal QRS complex is identified based on the population of QRS complexes located within clusters of QRS features within the feature space. Subsequent QRS complexes acquired after identification of the normal QRS complex are labeled based on a plurality of rules and the location of each subsequent QRS complex with respect to both prior and subsequent normal QRS complexes.

Spread spectrum cellular handoff apparatus and method

Abstract: An apparatus for controlling handoff in a spread-spectrum-CDMA-communications system, of radio devices moving from a cell having a base station which transmits a first spread-spectrum-communications signal with a first generic-chip-code signal, toward a different cell having a base station for transmitting a second spread-spectrum-communications signal with a second generic-chip-code signal. A radio device includes a PCN antenna, a first matched filter having an impulse response matched to the first generic-chip-code signal and a first detector for detecting the first generic-chip-code signal embedded in the first spread-spectrum-communications signal. A second matched filter has an impulse response matched to the second generic-chip-code signal and a second detector detects the second generic-chip-code signal embedded in the second spread-spectrum-communications signal. A comparator generates a comparison signal by comparing the first detected signal with the second detected signal. A receiver-message-chip-code generator generates a replica of the message-chip-code signal and a message mixer, using a replica of the message-chip-code signal, despreads the spread-spectrum-communications signal as a modulated-data signal. A synchronization circuit, based on the comparison signal being greater than a threshold, synchronizes the receiver-message-chip-code generator to the first generic-chip-code signal for receiving the first spread-spectrum-communications signal, and in response to the comparison signal being less than the threshold, synchronizes the receiver-message-chip-code generator to the second generic-chip-code signal for receiving the second spread-spectrum-communications signal. A control unit switches transmitting the message data, spread-spectrum processed with a message-chip-code signal, embedded in the first spread-spectrum-communications signal from the first base station, to the second spread-spectrum-communications signal transmitted from the second base station.

A sense amplifier with an integral logic function

Abstract: A sense amplifier with an integral logic function for use in a circuit such as a tag cache portion of a microprocessor cache. In one form, the integral logic function is an exclusive-OR function. The sense amplifier senses a differential voltage developed between a differential pair of bit lines which are coupled to predetermined bit positions of a plurality of entries in a tag cache. While sensing the voltage, an exclusive-OR function is performed between the logic state of the sensed bit and a corresponding input address bit. If the input address bit matches the sensed bit, then a match signal is asserted. The value of the corresponding input address bit configures the circuit either to provide an output signal in a predetermined logic state if a true bit line signal voltage exceeds a complement bit line signal voltage, or to provide the output signal in the predetermined state if the complement bit line signal voltage exceeds the true bit line signal voltage.

Multi-frequency differentially encoded digital communication for high data rate transmission through unequalized channels

Abstract: A differentially encoded digital signal waveform is generated as a discrete time representation of a desired analog signal utilizing multi-frequency modulation techniques. The computational capability of present day, industry-standard microcomputers (57) equipped with a floating point array processor or digital signal processor chip is utilized to perform digital frequency encoding and compute both discrete Fourier transforms (31) and inverse discrete Fourier transforms (25) to provide a transmitter (51) and receiver (53) system utilizing suitably programmed microcomputers coupled by a communications channel.

Microfabricated thermal absolute-pressure sensor with on-chip digital front-end processor

Abstract: A thermal absolute pressure sensor of the heated microbridge type has been integrated with an active bias circuit and an 8-b successive approximation register analog/digital (A/D) converter. The chip, which contains about 1000 devices, is sensitive to variations in absolute gas pressure between 10 and 10/sup 4/ Pa, and it is implemented in a 4-Um NMOS technology merged with the microsensor process. The output of the chip is a robust digital signal adequate for transmission in high noise environments. >

Pulse phase difference encoding circuit

Abstract: A pulse phase difference encoding circuit provides a digital signal indicating a phase difference between a first input pulse and a second input pulse. The first input pulse is provided to and circulated in a ring signal delay circuit having a plurality of signal delay elements that are connected in series. Intermediate points between the delay elements provide delayed pulses having different delay times. Upon receiving the second input pulse, a selector selects one delay pulse provided by the delay element at which the first input pulse has arrived, and generates a digital positional signal indicating a position of the selected delay element. The number of rounds of circulation of the first input pulse in the ring signal delay circuit is separately counted. According to the number of rounds of circulation of the first pulse and the positional signal, the digital signal indicating the phase difference between the first and second input pulses is formed.

Direct-sequence spread-spectrum digital signal acquisition and tracking system and method therefor

Abstract: A system and method of driect-sequence spread-spectrum TDMA (or TDD) digital communication, wherein acquisition and tracking occurs for a plurality of frames having a predetermined number of time slots. One of the predetermined number of time slots in each frame is assigned for acquisition purposes and carries acquisition and sync digital information. The remaining time slots in each frame have assigned header bytes for tracking purposes. The assigned acquisition time slot is spread with an acquisition direct-sequence spreading code. The remaining time slots are spread with a communication direct-sequence spreading code. During acquisition, the signal strength in each successive time slot for each spread frame is measured for a given number of time frames. The peak is located within the given number of time frames through a major acquistion sweep and a refinement sweep. The major acquisition sweep and refinement acquisition sweep locate the frame and time slot boundaries of the transmitted signal. Once acquired, tracking occurs during the header bytes of each successive remaining time slot. Acquisition, tracking and demodulation of the digital data is performed with the same circuitry.

Format conversion of digital video signals, integration of digital video signals into photographic film material and the like, associated signal processing, and motion compensated interpolation of images

Abstract: A system for integrating film material with a digital video signal employs a film scanner to produce a digital video signal from the source film, and a post production system for combining with that signal the input digital video signal Motion interpolated temporal compensation is employed at stages of frame rate conversion

Optical/electrical transceiver

Abstract: A patient monitoring system is provided which includes a monitor and a transmitter which can optically communicate with each other. The monitor receives analog physiological data from a patient and converts the analog data to a digital optical signal which is sent to the transmitter optically. The transmitter includes a memory for storing the digital signal thereby allowing separation of the monitor from the transmitter prior to subsequent transmission. Additionally, the transmitter is capable of converting the digital signal to a modulated tone for transmission via standard phone lines. In this manner, the transmitter is able to send the converted signal to a central processing system via phone lines. This converted signal can then be monitored at the central processing system or it can be further communicated to one or more remote receiving stations.

Low bit rate speech coding system and compression

Abstract: A speech coder apparatus operates to compress speech signals to a low bit rate. The apparatus includes a continuous speech recognizer (CSR) which has a memory for storing templates. Input speech is processed by the CSR where information in the speech is compared against the templates to provide an output digital signal indicative of recognized words, which signal is transmitted along a first path. There is further included a front end processor which is also responsive to the input speech signal for providing output digitized speech samples during a given frame interval. A side information encoder circuit responds to the output from the front end processor to provide at the output of the encoder a parameter signal indicative of the value of the pitch and word duration for each word as recognized by the CSR unit. The output of the encoder is transmitted as a second signal. There is a receiver which includes a synthesizer responsive to the first and second transmitted signals for providing an output synthesized signal for each recognized word where the pitch, duration and amplitude of the synthesized signal is changed according to the parameter signal to preserve the quality of the synthesized speech.

Spread spectrum conference call system and method

Abstract: A spread spectrum communications system for use over a communications channel, including a transmitter-generic-chip-code generator, a transmitter-message-chip-code generator, an EXCLUSIVE-OR gate, a combiner, a transmitter, a receiver-generic-chip-code generator, a generic mixer, a generic-bandpass filter, a receiver-message-chip-code generator, a message mixer, a message-bandpass filter, and a synchronous detector. The transmitter-generic-chip-code generator generates a generic-chip-code signal and the transmitter-message-chip-code generator generates a message-chip-code signal. The EXCLUSIVE-OR gate spread-spectrum processes message data with the message-chip-code signal to generate a spread-spectrum signal. The combiner combines the generic-chip-code signal with the spread-spectrum signal. The transmitter transmits the combined generic-chip-code signal and spread-spectrum signal, on a carrier signal over the communications channel as a spread-spectrum-communications signal. The receiver-generic-chip-code generator generates a replica of the generic-chip-code signal. The generic mixer recovers the carrier signal from the spread-spectrum-communications signal. The receiver-message-chip-code generator generates a replica of the message-chip-code signal. The message mixer despreads the spread-spectrum-communications signal as a modulated-data signal. The tracking and acquisition circuit uses the recovered carrier signal for synchronizing the replicas of the generic-chip-code signal to the recovered carrier signal. The synchronous detector synchronously demodulates the modulated-data signal as received data.

Cryptographic key distribution method and system

Abstract: A method for establishing cryptographic communications comprising the steps of: generating a first key-encryption-key signal; transforming, using a public-key-encryption algorithm, the first key-encryption-key signal to a first ciphertext signal; generating a second key-encryption-key signal; transforming, using the public-key-encryption algorithm, the second key-encryption-key signal to a second ciphertext signal; decoding, using the public-key-decryption algorithm, the first ciphertext signal and the second ciphertext signal, thereby generating the first key-encryption-key signal and the second key-encryption-key signal; transforming, using a secret-key-encryption algorithm, the first key-encryption-key signal and the second key-encryption-key signal to a third ciphertext signal; and decoding, using a secret-key-decryption algorithm and the first key-encryption-key signal, the third ciphertext signal thereby generating the second key-encryption-key signal.

Digital clock timing generation in a spread-spectrum digital communication system

Abstract: A unique method and system is disclosed for generating digital clock timing in a receiver for use in direct-sequence spread-spectrum digital communication systems wherein spread data is delivered from a transmitter to a receiver. The present invention provides at the transmitter frames of digital communication data with each frame having a plurality of time slots and with each time slot having a plurality of digital bits. The transmitter utilizes direct-sequence spreading codes for spreading the digital bits in the time frame. The direct sequence spreading codes each have the same fixed sequence length of M chips and, furthermore, the number of chips per bit CB to spread each digital bit is constant and fully aligned with each digital bit. The ration of M:CB is an integer and the ratio of time of each time slot to the time of the M chips also equals an integer. The spread frames of digital information are despread at the receiver with receiver provided identical direct-sequence codes. The digital clock timing is generated from the receiver's pseudo random sequence generator. Bit timing equals CB*8, nibble timing equals 4*CB, and byte timing equals CB.

Device for measuring altitude and barometric pressure

Abstract: A device for measuring altitude and barometric pressure having a barometric pressure sensor, an amplifying circuit for amplifying the output signal from the pressure sensor, an analog to digital converter for converting the output signal from the amplifying circuit to a digital signal, and an altitude information generator for generating altitude information from the output signal of the analog to digital converter. A display displays the altitude information from the altitude information generator and the pressure information detected by the pressure sensor with pressure variation information and converts it into precise altitude information in accordance with temperature compensation data and altitude compensating data based upon regional and time information. The device may be used in climbing or the like with remarkable reliability.

Computer-controlled uninterruptible power supply

Abstract: A computer-controlled, uninterruptible power supply system is disclosed. The system selectively operates from more than one input source of power, e.g. an AC line input, an external DC input and internal batteries. The system is of the type which utilizes one or more switch mode converters and is well suited for use in computer systems. The switch mode regulator has a PWM clock signal and provides a PWM drive signal. The PWM clock signal frequency is substantially greater than the PWM drive signal frequency. Transferring between the DC power sources is done in a manner substantially transparent to the regulator and the load, generally as follows. A signal indicating a transfer to a selected one of the DC power sources is gated in response to the PWM clock signal to form a first logic signal that is synchronized to the PWM clock signal. The first logic signal is gated in response to the PWM drive signal so as to form a second logic signal that is further synchronized to the PWM drive signal. Finally, the PWM drive signal is gated to a selected switching circuit responsive to the second logic signal, so that transfers between the DC power sources are fully synchronized to the PWM clock signal and to the PWM drive signal.

Digital motor controller.

Abstract: A digital motor controller (10) employs a digital signal processor (70) to generate commutation commands that drive and brake a motor (14). The commutation commands are pulse width modulated. To avoid shoot-through, the digital signal processor (70) automatically adjusts the widths of the pulses according to the amount of current being drawn by the motor (14). Motor speed is measured by taking the difference between consecutive samples from a position sensor and dividing the difference by the sampling time. The digital signal processor (70) also closes position, speed and current loops. The commands provided by each loop are limited between upper and lower limits. Further, the digital signal processor (70) automatically adjusts the upper and lower limits to compensate for changes in design characteristics due to viriations in temperature. The digital motor controller (10) can be used to control different motors (14) having different design characteristics simply by reprogramming the upper and lower limits. A plurality of digital motor controllers (10) can be used to control motors (14) operating in tandem.

Digital signal recording apparatus

Abstract: A digital signal recording apparatus is provided with data compressing means for reducing the amount of data of digital information supplied; recording means which is arranged to be capable of selectively recording the digital data supplied or digital data compressed by the data compressing means by means of at least one pair of heads; and switching means for switching a cycle in which recording is performed by the pair of heads from one cycle over to another according to the information to be recorded by the recording means.

Apparatus for digitally demodulating a narrow band modulated signal

Abstract: A digital demodulating apparatus which is high in accuracy in operation and simple in construction. The digital demodulating apparatus comprises an analog to digital converter for converting an input modulated signal having a carrier frequency of fc and a band width of 2B into a digital signal with a sampling clock signal of a sampling frequency of fs, a sampling clock generating circuit for generating a clock signal of the sampling frequency fs which is defined as fc≃(2m+1)/4·fs and fs>4B m being an arbitrary integer, an orthogonal component extracting circuit for extracting, from an output digital signal of the analog to digital converter, two components which are different by (an odd number/2)·π in phase from each other, and a demodulator of the digital signal processing type for receiving such two extracted components from the orthogonal component extracting circuit and producing a demodulated signal from the two received components.

Computed tomography apparatus using image intensifier detector

Abstract: Disclosed is a low cost computer tomographic (CT) scanner system specifically designed for radiation therapy treatment planning. A 512-channel photo-diode array (44) with digitizing electronics converts image intensifier (40) optical projection data directly into digital signals and has a dynamic range on the order of 1000,000:1. The new simulator includes a rotating gantry, an X-ray generator (30) with radiographic and fluoroscopic modes and a therapy style patient support assembly. Results on head and body size phantoms indicate that the simulator X-ray generator and image intensifier tube (IIT) (40) with multi-channel photo-detector (44) can produce photon statistic limited CT images. Software and hardware compensation methods are described which minimize geometrical distortions. Low noise, high input impedance electronics are employed which are phase locked to the line frequency. A dual sample interval method is employed which effectively increases the range of the digital signal produced by the front-end electronics by three additional bits.

Direct digital FM waveform generator for radar systems

Abstract: A linear FM waveform generator employs direct digital synthesis and includes a digital linear FM signal generator, a digital-analog converter, and a sampler means. The linear FM waveform generator includes a frequency slope register coupled to a first stage integrator which in turn is coupled to a second stage integrator, all of which operate off a system clock. The output signal from the second stage integrator represents phase as a quadratic function of time. A stored sine look-up table is referenced to generate an output digital signal representing amplitude as a function of time. The output digital signal is converted to an analog linear FM waveform which in turn is coupled to a sampler that includes a step recovery diode and a fast switch. The sampler aperture is sufficiently small that the sampler output linear FM waveform includes base and higher harmonic spectra with amplitude attenuation small enough to enable a third or higher harmonic spectra to be used for generation of the output linear FM waveform. The sampler output is filtered to pass a higher harmonic spectra which is directly coupled to output multiplication and filter circuitry.

Read-out of photodiodes using sigma-delta oversampled analog-to-digital converters.

Abstract: Sigma-delta analog-to-digital conversion is used in sensing apparatus that generates a digital signal descriptive of light energy received by a photosensor, such as one of a plurality of photosensors that together receive various elements of a radiant-energy image. A preamplifier generates an analog output signal responsive to the photocurrent of the photosensor, which analog output signal is undesirably accompanied by wideband noise. The analog output signal is supplied to a sigma-delta analog-to-digital converter, the decimation filter of which not only suppresses in the digital signal a component arising from the quantization noise from the sigma-delta modulator portion of the analog-to-digital converter, but also suppresses a component arising from remnant wideband noise from the preamplifier.

Apparatus and method for demodulating a digital modulation signal

Abstract: A demodulating apparatus comprises a frequency detector for performing a frequency-detection on a digital modulation signal to acquire a detection signal, a clock generator for generating a clock signal, and a discrimination circuit for sampling a voltage level of the detection signal from the frequency detector at a clock timing of the clock signal from the clock generator, and converting the sampled voltage level into digital data, which is set to have one of first and second logic values on the basis of a reference voltage LDC. Particularly, the discrimination circuit includes a control circuit for comparing the voltage level En sampled at a clock timing, voltage level En-1 sampled at a timing one clock earlier than En and voltage level En-2 sampled at a timing two clock earlier than En, with first and second threshold voltages LA and LB respectively higher and lower than the reference voltage LDC, and controlling the clock generator to synchronize the phase of the clock signal with the detection signal when it is detected from the comparison that anyone of first and second conditions is satisfied where the first condition is En-2

Synchronous digital detection of position error signal

Abstract: A sample data position error signal detection means. This invention has application in a digital servo in a magnetic media disk drive environment. In particular, the invention relates to the detection in digital form of position error signals (PES) representative of magnitude and sign of recording head displacement from a track center line. The circuits disclosed provide a digital representation of PES suitable for direct application to a digital signal processor which controls overall servo positioning operations. The invention detects the PES by employing a digital integrator which comprises a register and adder. The composite servo data is first amplified by variable gain amplifier and then undergoes low pass filtering before being digitized by an analog to digital converter (ADC). The digital integration is performed by accumulating a constant number of ADC samples in the register. Before being accumulated in the register, the sampled servo data is alternately multiplied by plus or minus one, using an exclusive-OR gate cascade interposed between the ADC output and adder input. The multiplication of the sampled servo data by plus one or minus one is required for synchronous rectification. Upon completion of accumulation of a prescribed number of ADC samples, the contents of the register are transferred to a temporary buffer pending interrogation by the servo controlled digital signal processor.

Digital pulse-width-modulation generator for current control

Abstract: The circuit provides digital control of current in an inductive load. A switching circuit generates a square wave PWM voltage drive to the load, and the current is sensed by sensor. This current is fed back as signal, which is compared with two zone boundary signals. The switching state is changed between ON and OFF accordingly. The boundary signals are generated by adding and subtracting (by adder/subtractor) a half-zone-width signal (stored as digital data) in a zone width store with the signal. The zone position may be moved slightly up and down, under control of a counter driven by the ON/OFF signal, to produce dither. The zone width may be selected in dependence on the input signal to reduce ripple at low signal, and to adjust the frequency. The switching circuitry may have multiple power supplies, and/or means for changing the connection of the load to the power supply to modify the rate of change of current and the direction of current in the load. A separate analogue input may be summed with the feedback signal or the D/A output to modify the current magnitude or replace the input signal as the main input signal.

System for generating correction signals for use in forming low distortion analog signals

Abstract: A method and apparatus for generating correction signals for use in forming low distortion analog signals. A digital representation of a desired analog waveform is encoded into a digital data signal which is outputted to memory. A digital correction signal is encoded, having an opposite phase and increased amplitude from the signal distortion which it is determined will occur when the digital data signal is repetitively read out of memory and decoded. This digital correction signal is outputted to memory. The digital data and correction signals are repetitively and synchronously read out of memory into a decoder. The decoder converts both digital signals into analog signals, so that the analog correction signal may superpose on the distortion in the analog data signal, resulting in a low distortion analog signal.

Video printer with separately stored digital signals printed in separate areas to form a print of multiple images

Abstract: A video printer is disclosed. An input video signal is converted into a digital signal and stored in a memory. The write/read operation and memory addresses of the memory are controlled by a memory control unit. The signal read out of the memory is converted into print data, and an image is printed by a printer. The print data and the printing operation are controlled by a print control unit, and at least a part of the memory areas of the memory is controlled in the write operation by an area control unit.