Showing papers on "Digital signal published in 2002"

Copyright detection and protection system and method

Abstract: A method for detecting against unauthorized transmission of digital works comprises the steps of maintaining a registry of information permitting identification of digital copyrighted works, monitoring a network for transmission of at least one packet-based digital signal, extracting at least one feature from the at least one digital signal, comparing the extracted at least one feature with registry information and applying business rules based on the comparison result.

M-QAM-OFDM system performance in the presence of a nonlinear amplifier and phase noise

Abstract: The orthogonal frequency-division multiplexing (OFDM) modulation format has been proposed in Europe as the standard for broadcasting both audio and television digital signals and for wide-band wireless communication systems (e.g., HIPERLAN II). The performance of the OFDM scheme is severely affected by the nonlinearity of the high-power amplifier at the transmitter end and by the phase noise of the oscillators. In this paper, we investigate the joint effects induced on the OFDM signal by the amplifier nonlinearity and by the phase noise. An accurate statistical description of each contribution to the signal distortion is provided. Theoretical results show perfect agreement with those obtained by simulation and they can be used to derive the OFDM system performance, without the need to run extensive simulations.

Method and apparatus for transmission line analysis

Abstract: A method and system for performing sequence time domain reflectometry to determine the location of line anomalies in a communication channel is disclosed. In one embodiment, the system generates a sequence signal (1202) and transmits the sequence signal over a channel that is the subject of the sequence time domain reflectometry analysis (1212). The reflection signal is then received (1214) and correlated with the original sequence signal (1222) to generate a correlated signal. The system performs signal analysis of the correlated signal to determine a time value between the start of the reflection signal and the subsequent points of correlation. Based on the time value and the rate of propagation of the signals through the channel, the reflection-processing module can determine a distance from the system to a line anomaly (1230).

Wireless medical monitoring apparatus and system

Abstract: An apparatus for monitoring an electrical signal from a patient's body includes a disposable electrode patch (10) having a thin flexible housing (12) with an adhesive exterior, a power source (14), a printed circuit board (16), a plurality of electrodes (18), a convertor (20) for converting a detected electrical signal from the patient's body to a digital signal, a processor (22) for processing the digital signal, and a transmitter (24) connected for transmitting the processed digital signal as a wireless signal. A monitoring unit (40) communicating with the electrode patch includes a power source, a transceiver, a global positioning receiver, a processor, at least one communication port for external communications, and a display. A system of the invention includes a plurality of patients having medical monitors wirelessly communicating biometric information to a central processor for archiving and accessing.

Apparatus for data recovery in a synchronous chip-to-chip system

Abstract: An apparatus that reduces sampling errors for data communicated between devices uses phase information acquired from a timing reference signal such as a strobe signal to align a data-sampling signal for sampling a data signal that was sent along with the timing reference signal. The data-sampling signal may be provided by adjustably delaying a clock signal according to the phase information acquired from the strobe signal. The data-sampling signal may also have an improved waveform compared to the timing reference signal, including a fifty percent duty cycle and sharp transitions. The phase information acquired from the timing reference signal may also be used for other purposes, such as aligning received data with a local clock domain, or transmitting data so that it arrives at a remote device in synchronism with a reference clock signal at the remote device.

Wavelet-based reversible watermarking for authentication

Abstract: In the digital information age, digital content (audio, image, and video) can be easily copied, manipulated, and distributed. Copyright protection and content authentication of digital content has become an urgent problem to content owners and distributors. Digital watermarking has provided a valuable solution to this problem. Based on its application scenario, most digital watermarking methods can be divided into two categories: robust watermarking and fragile watermarking. As a special subset of fragile watermark, reversible watermark (which is also called lossless watermark, invertible watermark, erasable watermark) enables the recovery of the original, unwatermarked content after the watermarked content has been detected to be authentic. Such reversibility to get back unwatermarked content is highly desired in sensitive imagery, such as military data and medical data. In this paper we present a reversible watermarking method based on an integer wavelet transform. We look into the binary representation of each wavelet coefficient and embed an extra bit to expandable wavelet coefficient. The location map of all expanded coefficients will be coded by JBIG2 compression and these coefficient values will be losslessly compressed by arithmetic coding. Besides these two compressed bit streams, an SHA-256 hash of the original image will also be embedded for authentication purpose.

Multichip led package with in-package quantitative and spectral sensing capability and digital signal output

Abstract: A multichip light-emitting-diode package having a support member, at least two light-emitting-diode chips disposed on the support member, at least one sensor disposed on the support member for reporting quantitative and spectral information to a controller, relating to the light output of the light-emitting-diodes, and a signal processing circuit, including an analog-to-digital converter logic circuit, disposed on the support member for converting the analog signal output produced by the sensors to a digital signal output.

Method and apparatus for converting a low dynamic range analog signal to a large dynamic range floating-point digital representation

Abstract: An analog-to-digital conversion scheme allows the conversion of a small dynamic range analog signal into a floating-point, digital representation with a larger dynamic range. A montonically changing analog signal is reset to a reference value at time t=0. The analog signal is then sub-converted by an analog-to-digital converter with maximum input signal level S s to corresponding digital representations at several sub-conversion times t=T 2 >T 1 , t=T 3 >T 2 , . . . t=T M >T M−1 , where T M ≦T. These digital representations are then suitably combined to produce a cumulative, floating-point digital representation which accurately represents the analog signal even if the analog signal has a value greater than S s at time t=T.

Semiconductor integrated circuit

Abstract: A semiconductor integrated circuit comprises a digital-to-analogue converter for converting a digital signal into an analogue signal to output an analogue current signal, a current-to-voltage converter for converting the analogue current signal output by the digital-to-analogue converter, into an analogue voltage signal whose level has been controlled, and a filter for filtering the analogue voltage signal converted by the current-to-voltage converter. The current-to-voltage converter converts the current signal into the voltage signal in which a factor variable in accordance with manufacturing process conditions and/or environmental conditions has been corrected.

Communication system using short range radio communication headset

Abstract: In a short range radio communication headset, signals transmitted by the short range radio communications are received while direct sounds propagated from an external are detected Then, a digital signal adaptation processing using either received signals or the direct sounds as reference signals are applied, and a ratio between the received signals and the direct sounds is controlled by correlating the reference signals and another one of the received signals and the direct sounds that are not used as the reference signals and extracting necessary components

Radio base station receiver having digital filtering and reduced sampling frequency

Abstract: A station for processing a first signal which can be generated by a mobile terminal and belongs to a plurality of signals for mobile radio communications networks. The stations include an input able to receive from an antenna the first signal associated with a first band and at least one adjacent signal of said plurality associated with a second band adjacent to that of the first signal; a processing stage for generating from the first digital signal at a first sampling frequency, this first digital signal including a useful spectral content of the first signal and an interfering spectral content associated with the adjacent signal; a digital filter for processing the first digital signal, attenuating the interfering spectral content, and for providing a filtered digital signal including at least part of the useful special content sampled at a second sampling frequency less than the first sampling frequency and an electro-optical converter for generating from the filtered digital signal electromagnetic radiation to be transmitted on a waveguide.

Transceiver for fixed wireless access network applications

Abstract: A combined wireless transceiver and signal conversion unit comprises a radio receiver for receiving a wireless radio signal, and a converter for converting the signal into a form having a communications protocol supported by a communications port of a user digital device. An output device is provided for transmitting the converted signal to a user digital device via a wireline or other suitable medium for carrying the converted signal. The unit includes an input device for receiving a communications signal from the communication port of a user digital device via a wireline or other suitable signal transmission medium, and a transmitter for converting the received signal to a form for wireless transmission.

Method and apparatus for bit-to-bit timing correction of a high speed memory bus

Abstract: A synchronization circuit performs bit-to-bit timing correction of respective digital signals in digital signal packets applied to a packetized memory device. Each digital signal packet includes a plurality of digital signals applied to respective latches in the packetized memory device. A clock generator circuit generates a plurality of internal clock signals responsive to the external clock signal, each internal clock signal having a corresponding phase relative to the external clock signal. A plurality of selection circuits are coupled to the clock generator circuit and each has an output coupled to a clock terminal of an associated latch. Each selection circuit applies one of the internal clock signals to clock the associated latch in response to a phase command signal. An evaluation circuit receives digital signals sequentially stored in a selected one of the latches and generates a results signal indicating whether each of the digital signals has an expected value. A control circuit sequentially selects the latches and operates for each selected latch to adjust the phase command signals applied to the selection circuit coupled to the selected latch and store respective results signals sequentially received from the evaluation circuit for each phase command signal. The control circuit generates a final phase command signal from the stored results signals and applies each final phase command signal to the corresponding selection circuit Each of the final phase command signals adjusts the phase of clock signal applied to the associated latch relative to the digital signal applied to the latch so that the digital signal is successfully captured responsive to the clock signal.

A/D precision requirements for an ultra-wideband radio receiver

Abstract: Ultra wideband radio (UWB) is a new wireless technology that uses narrow pulses to transmit information. Implementing an "all-digital" UWB receiver has numerous potential benefits ranging from low-cost and ease-of-design to flexibility. Digitizing an RF signal near the antenna, however, introduces its own set of challenges and has traditionally been considered infeasible. A high-speed, high-resolution analog-digital converter (ADC) is difficult to design, and is extremely power-hungry. The viability of an "all-digital" architecture, therefore, hinges upon the specifications of this block. In this paper, we demonstrate that 4 bits of resolution are sufficient for reliable detection of a typical UWB signal that is swamped in noise and interference.

Optical communications systems, devices, and methods

Abstract: A method of transmitting an optical communications signal, comprising receiving a first signal, encoding the signal with a differential or duobinary encoding scheme (52), encoding the signal with an oscillating signal component (52), and sub-carrier modulating the signal onto a sub-carrier of an optical carrier signal (56, 58). The invention also relates to corresponding systems and apparatuses.

Digital optical transmitter

Abstract: A cable television system (100) having forward and reverse paths includes, in the reverse path, a digital optical transmitter (200) for receiving an RF signal, converting it to a digital signal, and adding a digital pilot tone thereto. A laser is driven in accordance with the summed digital signal to generate a digital optical signal representative of the pilot tone and the RF signal. The cable television system (100) also includes an optical receiver (305) for receiving the digital optical signal and recovering therefrom the RF signal and the pilot tone. The optical transmitter (200) and receiver (305) are coupled by fiber optic communication media (110).

Automatic floating-point to fixed-point conversion for DSP code generation

Abstract: The development of methodologies for the automatic implementation of floating-point algorithms in fixed-point architectures is required for the minimization of cost, power consumption and time to market of digital signal processing applications. In this paper, a new methodology of implementation in Digital Signal Processors (DSP) under accuracy constraint is presented. In comparison with the existing methodologies, the DSP architecture is completely taken into account for optimizing the execution time under accuracy constraint. The justification and the different stages of our methodology are presented.

Biological optical measuring instrument

Abstract: A biomedical optical measurement apparatus comprising a light source unit for generating an inspection light containing multiple lights modulated at different frequencies, a light-receiving unit for receiving the light generated at said light source unit and passing through an object to be examined and for outputting the electric signals with the intensity corresponding to the received inspection light, and a detection means for detecting a signal with the same frequency of the reference signal in the output from said light-receiving unit. The detection means comprises an analog-digital conversion means for outputting digitized data by converting an input signal to a digital signal, a storage means for storing digitized data of multiple reference signals, a digital multiplication means for multiplying digitized data of input signals outputted from the analog-digital converting means by the digitized data of the reference signals read out from the storage means and for outputting the product of multiplication, and a digital band-limitation means for taking out DC data from the output from the digital multiplication means. Reference signal generating circuits of a number equal to that of frequencies of detected signals, which has been necessary for the conventional instrument, can be replaced by a single memory means and the configuration of the instrument can be simplified. Changes in frequency can be easily coped with by only re-writing the data of the storing means.

Solid state image sensor and video system using the same

Abstract: A solid state image sensor includes an area sensor section having photoelectric conversion pixels arranged in the form of a matrix, a pixel selection section for selecting a pixel of the area sensor section and reading out a video signal, an analog signal processor section for performing signal processing for the video signal, an analog-digital conversion section for converting the processed signal into a digital signal, a digital signal processor section for performing signal processing to convert the digital signal into a digital signal having a predetermined signal format, and an interface section which operates in accordance with an external command, and has the function of selecting a video signal obtained by digitizing a pixel or a signal obtained by performing processing for the luminance and color difference signals of the video signal. These sections are mounted on a single chip.

Linear electric motor controller and system for providing linear speed control

Abstract: The invention relates to a method of, and system for, linear speed control for an electric motor, in which a digital to analog converter means is used for converting an 8-bit digital signal to an analog voltage for setting voltage across a motor, a digital state machine means is used for converting the duty cycle of an input signal for output to the digital to analog converter means, and a closed loop feedback loop means is used for monitoring and setting the voltage across the motor. An over-current sense circuit can be used for monitoring the current across the electric motor. An over/under voltage sense circuit can be used for monitoring voltage of the electric motor. The resulting 8-bit digital control signal is converted to an analog voltage for the electric motor. Such methods and systems find particular use in automotive applications.

Audio reproducing apparatus

Abstract: Even when both a digital audio signal and an analog audio signal are inputted, a type of inputted digital audio signal is identified, and an internal signal path is automatically switched based on the result of the identification operation and previously set content. A main storage of a host microcomputer 12 stores signal path information indicating a signal path to be selected for each type of digital audio signal inputted from each external AV apparatus. A DIR 3 identifies the type of digital audio signal inputted from a digital input terminal 1. The host microcomputer 12 switches an A/D switching selector 4 and an analog direct/DSP process switching selector 7 respectively so that a signal path corresponding to the type of signal shown in the result of an identification operation of the DIR 3 is selected, based on the signal path information.

Effect of atmospheric turbulence on bit-error rate in an on-off-keyed optical wireless system

Abstract: Atmospheric turbulence produces scintillation at an optical receiver, which leads to fading of the received signal. This fading affects the bit-error-rate (BER) of a digital signal in a way that depends on the depth of the fade, the decision threshold at the receiver, and the average signal-to-noise ratio. The degree of fading can be dramatically reduced by the use of a time-delayed diversity technique, which involves retransmission of the data stream after a short delay, and resynchronization of the received data streams.© (2002) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.

Controlling the propagation of a control signal by means of variable I/O delay compensation using a programmable delay circuit and detection sequence

Abstract: The propagation of a feedback signal, such as a DQS signal generated in response to a read request in a Double Data Rate (DDR) memory system, into a digital host system, such as an ASIC, is controlled by using a programmable delay circuit and detection sequence to compensate for variable I/O delay. The memory system includes a controller and an interface, both on the ASIC, and memory units coupled to the controller through the interface. The interface uses the read request signal, sent by the controller to initiate read operations, to generate a select signal. A programmable delay element inside the interface unit is programmed using a delay value generated by a delay manager unit inside the controller. The programmable delay element delays the select signal, and an enable signal is generated from the delayed select signal, using DQS. The propagation of DQS is controlled by the enable signal. For a number of preferred delay values that are determined through the detection sequence, the enable signal allows DQS to propagate into the ASIC only when DQS is a valid digital signal.

Digital signal processing system and method for a telephony interface apparatus

Abstract: A signal processing method including the steps of: receiving a first audio signal; detecting the presence of one or more shrieks within an audible frequency range of said audio signal; creating one or more filters to selectively attenuate the respective one or more shrieks within the audible frequency range; filtering the audio signal using the one or more filters; and transmitting the filtered audio signal to an audio telephone device.

Fast RNS FPL-based Communications Receiver Design and Implementation

Abstract: Currently, several design barriers inhibit the implementation of high-precision digital signal processing (DSP) systems with field programmable logic (FPL) devices A new demonstration of the synergy between the residue number system (RNS) and FPL technology is presented in this paper The quantifiable benefits of this approach are studied in the context of a high-end communications digital receiver A new RNS-based direct digital synthesizer (DDS) that does not need a scaler circuit is introduced The programmable decimation FIR filter is based on the arithmetic benefits associated with Galois fields and supports tuning the IF frequency as well as its bandwidth Results show the proposed methodology requires fewer resources than classical designs, while throughput advantage is about 65%

Packet identification mechanism at the transmitter and receiver for an enhanced ATSC 8-VSB system

Abstract: A flexible digital transmission system that improves upon the ATSC A/53 HDTV signal transmission standard. The system includes a digital signal transmitter for generating a first Advanced Television Systems Committee (ATSC) standard encoded 8-VSB bit stream and, for generating an encoded new robust bit stream for transmitting high priority information bits, wherein symbols of the new bit stream are capable of being transmitted according to a transmission mode including: a 2-VSB mode and a 4-VSB transmission mode. The standard 8-VSB bit stream and new bit stream may be simultaneously transmitted over a terrestrial channel according to a broadcaster defined bit-rate ratio. The transmission system includes a control mechanism for generating information needed for encoding robust packets at a transmitter device. It also includes a mechanism for encoding control parameters and multiplexes the generated information with the standard and robust bit-streams for transmission. A receiver architecture is additionally provided to decode standard and robust bit-streams transmitted by the transmitter device.

Data input circuits and methods of inputting data for a synchronous semiconductor memory device

Abstract: A data input circuit for a synchronous semiconductor memory device may comprise a detection unit for detecting whether the phase of a data strobe signal may lead or lag that of a clock signal. A delay unit may delay the data strobe signal by a first duration when the phase of the data strobe signal leads that of the clock signal and may delay the data strobe signal by a second duration when the phase of the data strobe signal lags that of the clock signal. A data input unit may synchronize a first input data signal previously fetched by the data strobe signal to the clock signal in response to an output signal of the delay unit. The data input circuit may effectively synchronize an input data signal using an internal delay that may be adjusted when a frequency of the clock signal may exceed a predetermined threshold.

Digital configurable macro architecture

Abstract: A new digital configurable macro architecture is described. The digital configurable macro architecture is well suited for microcontroller or controller designs. In particular, the foundation of the digital configurable macro architecture is a programmable digital circuit block. In an embodiment, programmable digital circuit blocks are 8-bit circuit modules that can be programmed to perform any one of a variety of predetermined digital functions by changing the contents of a few registers therein, unlike a FPGA which is a generic device that can be programmed to perform any arbitrary digital function. Specifically, the circuit components of the programmable digital circuit block are designed for reuse in several of the predetermined digital functions such that to minimize the size of the programmable digital circuit block.

Digital signal transmitter synchronization system

Abstract: Methods, and apparatus for carrying out the methods, are disclosed for synchronizing a plurality of RF transmitters that are supplied with a common digital information signal for carrier modulation and subsequent transmission on a common channel throughout a prescribed region, whereby the digital signal receivers within the region may receive transmissions on the channel from more than one transmitter. The method involves inserting reference signals into the data sent to the transmitters in order to place them into known states at specific times relative to the digital signals sent to them for transmission. As a result of this method, the digital signals transmitted by each of the transmitters will be identical to one another so that the receivers will be able to identify one received signal as the main signal and the others as echoes. If necessary, the signal transmitted by at least one of the synchronized transmitters may be delayed, such that identical digital signals received from at least two of the transmitters by receivers in the region will arrive at each receiver within a prescribed time window. The methods and apparatus also can be applied to one or a plurality of RF transmitters for purposes of synchronizing processes at the source of the signals and at the transmitters.