Showing papers on "Encoding (memory) published in 1987"

Image data processing apparatus capable of high-speed data encoding and/or decoding

Abstract: An image data processing apparatus capable of high-speed encoding even for intermittently supplied image data is provided with a memory storing image data, an encoder for encoding the image data and/or a decoder for decoding such encoded information and a transfer unit for DMA transfer of the image data from the memory to the encoder. A supply may be provided for supplying the encoder with the reference signals in synchronization with the DMA transfer of the image data by the transfer unit. The encoding and/or decoding are performed intermittently, e.g., in response to supply of the reference signals.

Secure transfer of radio specific data

Abstract: The apparatus and method for transferring radio specific data from the memory of an integral logic unit of a radiotelephone to a second, replacement, memory is disclosed. Security of the data is realized by encoding the radio specific data with an operative number generated from a seed number. If the radio specific data is properly transferred to the second memory, the radio specific data is deleted from the memory of the integral logic unit.

Shared circuitry for the encoding and syndrome generation functions of a Reed-Solomon code

Abstract: Apparatus is disclosed for providing an improved encoder and frequency-domain syndrome generator circuit implementing Reed-Solomon codes which reduces hardware by sharing circuitry between the encoding and frequency-domain syndrome generation functions. Self-checking for proper encoder operation during write operations is achieved by verifying that all remainders from dividing codewords by factors of the code generator polynomial are equal to zero after encoding. Apparatus implements fast finite-field multiplication by a selected constant using Read Only Memory circuits. Hardware required is further reduced by incorporating Random Access Memory circuits and employing time-multiplexing techniques. Interleaved codewords are supported by implementing memory circuits for storing intermediate results of other codewords while processing symbols from one codeword.

Mnemonic Training for the Acquisition of Skilled Digit Memory

Abstract: This article outlines a research strategy for investigating, in a laboratory setting, the acquisition and the "limits" of a cognitive skill. Expert digit memory is used as an illustration. Two participants with initial average digit-and word-span memory were trained to memorize and reproduce strings of 80 to 90 digits presented at 10- to 1-sec rates. The instruction and training program, based on a theory of skilled memory, focused on three components: (a) acquisition of a mnemonic system (i.e., recoding digits into historical dates or concrete nouns), (b) use of a long-term memory retrieval structure (i.e., instruction in the Method of Loci), and (c) improvement in processing speed. After 86 experimental sessions, one participant recalled 90 random digits presented at a 1-sec rate. The digits were, however, constrained to be compatible with the participant's historical knowledge. The second participant recalled 80 random digits presented at a 5-sec rate after 70 sessions. Speed of encoding and retrieval ...

Image processing device

Abstract: A binary or multi-level digital encoding device capable of digital encoding of image signal with plural sets of threshold levels through a simple and compact circuit The plural sets of threshold levels are stored in a memory and selected according to the level of the image signal representing image density

Picture encoding system

Abstract: PURPOSE:To always obtain high picture quality in a reproducing picture even when encoding processing is interrupted on the way of processing by providing a scanning circuit and an encoding circuit, etc., and transmitting in considering the local character of the picture at the respective stages of hierarchical encoding. CONSTITUTION:The picture information of an input still picture to be obtained by image pickup are inputted to a block dividing circuit 10 and in the circuit 10, the picture is divided into the two-dimensional block of 8 horizontal picture elements and 8 vertical picture elements. Next, linear quantization is executed for each block in a DCT circuit 11 and a quantizing circuit 12 and further, the block is converted to one-dimensional block in a one-dimensioning circuit 13. After that, an EOB symbol is added by an EOB symbol adding circuit 14 and the information are successively accumulated in a frame memory 15. Continuously, the information of one picture to be accumulated in the memory 15 are hierarchically encoded by a scanning circuit 16 and the after that, the encoding of the data at the respective stages is executed by using code tables 18 and 19 in an encoding circuit 17. Then, the transmission to consider the local character of the picture is executed at the respective stages of the hierarchical encoding.

A functionalistic approach to memory: theory and data

Abstract: The purpose of this article is to propose a conceptual frame of reference for memory research on the basis of two recent lines of development. One such key development is that of a functional orientation of memory research focusing on processing and function rather than structure and memory entities. The other line of development concerns information storage as distributed rather than localized. A functionalistic frame of reference involving a notion of distributed storage is proposed. According to this view remembering is seen as an interaction between available cognitive capabilities and demands of the task in which the individual is remembering something. Encoding is conceived of as an interaction between “affordances” of the environment and “functional dispositions” of the individual. Retrieval is seen as a re-activation of functional dispositions. The formation of unique combinations of functional dispositions plays a crucial role in obtaining perfect recall performance. The viability of the overall conceptual framework is demonstrated in three experimental studies. The development of the design and procedure for these experiments was a second purpose of this paper, namely to outline an experimental setting which could serve as a complement to computer simulations in studying notions of distributed storage.

Use of Self-Generated and others' Cues in Immediate and Delayed Recall

Abstract: Summary.-63 college students formed three groups. For mnemonic aids, they were instructed either to create stories to link lists of words or were given stories which were created by others. Compared to controls, there were no differences for immediate recall. Delayed recall showed that both using a story and generating it oneself produced superior performance. Long-term memory is the vircually unlimited score of that information which is more or less permanent. However, encoding information into longterm memory efficiently and retrieving it on cue are both tasks which may present problems. Several mnemonic techniques have been studied which both allow efficient encoding and provide retrieval cues. Studies of these techniques show improvement in memory relative to that in concrol conditions in which subjects are not instructed how to encode information. In one study, Bower and Clark (1969) had subjects learn several lists of words by eirher using a story to link the words or by repetitive rehearsal. Stories facilitated delayed but not immediate recall. The present question of interest is whether the act of creating the retrieval cues is critical to the success

Information data transmission system

Abstract: An information data transmission system deals with a plurality of kinds of information data different in quantity from one another and respectively corresponding to prescribed amounts of an information signal. The system has first encoding circuitry for encoding the plurality of kinds of information data and second encoding circuitry for predictively encoding the plurality of kinds of information data. The timing of the production of outputs from the first and second encoding circuits is such that, for all kinds of the plurality of information data, the quantity of information data encoded by the first encoding circuitry is equalized.

Compressing and encoding process system for data

Abstract: PURPOSE:To obtain a desired data compression result by adding information corresponding to the change point of color on one of two lines when data compression is carried out as to the information of the two lines. CONSTITUTION:Color information on the dot of the (n)th line is outputted from a line memory 11 while delayed by one line. A memory control part 13 generates a selection instruction corresponding to whether or not there is a change point signal. A change point detection part 12 detects the presence of change points on the (n)th line an the (n+1)th line and supplies the detection result to a memory control part 13. The memory 3 receives and stores the write data. An encoding and decoding part 4 extracts the contents of the memory 3 and performs encoding for transmission. A control part 5 performs transmission control and sends data to a circuit 8 through a modem 6 and a network control part 7. Thus, information is only added corresponding to the generation of a change point.

Input/output device

Abstract: PURPOSE:To obtain a miniaturized, weight-saving and low-priced facsimile equipment with a function displaying transmission/reception information by reducing retception picture information in a main picture scan direction CONSTITUTION:Encoded data being the retception picture information from a CCU interface is provisionally stored in a buffer memory 3 An encoding/ decoding device 2 transfers the data in the duffer memory 3 to a line memory 4 A display control part 8 reduces the data in the line memory 4 in the main scan direction and transfers it to a video memory 7, and displays the data in the line memory 7 on a liquid crystal display panel 9 Accordingly a liquid crystal display to display a comparatively short operation guidance, etc, with respect to the number of picture elements in the wain seanning direction of the reception picture information can display the reception picture information

Image information transmission system

Abstract: PURPOSE:To transmit image information efficiently by encoding then transmitting picture element data in a picture element block belonging to a moving picture area by a first encoding system and encoding then transmitting picture element data in a picture element block belonging to a still picture area by a second encoding system in which the order in array of respective data constituting a unit encoding data string is different from that in the former system. CONSTITUTION:In a moving detector 105, inter-frame difference value is compared with a set threshold value to output a one-bit moving information. Depending on thus obtained moving information, which of an average value (output from an average value arithmetic circuit 106) over two frames on a original data which is delayed for one frame (an output from a frame memory 103) should be encoded and transmitted is determined. For a moving block, an output from a frame memory is encoded by MIN-MAX method to transmit information in every frame. As for a still picture block, the average value over original data 1 and a one-frame-preceding data, i.e., an output from the frame memory is encoded by the MIN-MAX method, and thus information equal to one-frame-length is transmitted in two-frame duration. As a result, high-definition image information can be transmitted efficiency.

Memory control unit

Abstract: PURPOSE:To effectively use a memory expanded in the word direction for a cache memory by accessing a cache decoder part by an address formed by encoding a tag compared result. CONSTITUTION:A logic address 17 consisting of 32 bits outputted from a CPU is divided, upper 20 bits to be address-converted is transferred to an address conversion buffer TLB and the offset 12 bits 40 are transferred to a directory 35. A tag obtained by accessing the directory 35 by an index 43 consisting of 7 bits out of the offset 40 is compared with a physical address tag obtained from the buffer TLB by a comparing part 36, the compared result is encoded into 4 bits by the encoder part 37 and the encoded 4 bits are coupled with the offset 40 to form a cache address. The address is used for a chache data part as a unified address for utilizing a memory expanded in the word direction.

Television receiver comprising an apparatus for de-compacting compacted text characters

Abstract: The present invention provides for compacting and eventual decompacting of text characters for storage and is particularly useful in television receivers which include a micro-computer (30) which controls the receiver functions and provides on-screen display of messages for prompting the user. Display characters are compacted to minimize memory space by encoding the characters in nibble-length codes to maximize storage efficiency in memory (42) organized to store bytes of given bit length (e.g. 8-bits) the bit length of each "nibble" being a sub-multiple (e.g. 4-bits) of the byte length. I

Image encoding transmission device

Abstract: PURPOSE:To control the generation quantity of information by adjusting the area of a fixed level, by inputting a digital image signal, and switching a digital image signal and the fixed level in accordance with an occupancy rate of a buffer memory CONSTITUTION:A switching control part 3 inputs a digital image signal (b) which is sent out of an A/D converter 2, switches th digital image signal (b) and fixed level in accordance with the occupancy rate (c) of a buffer memory 5 and sends them out to an encoder 4 The encoder 4 executes the high efficiency difference encoding of an inputted signal, and this difference encoding signal is stored temporarily in the buffer memory 5, and thereafter, read out at prescribed speed, and sent out to a transmission line from an output terminal 6

Control system for frame size of image information

Abstract: PURPOSE:To shorten synthetically the entire transmission time by setting the size of an image information frame transferring image information to a CCU from a buffer memory great and small when the efficiency for encoding are high and low, respectively. CONSTITUTION:A G4 facsimile compresses and encodes image information and transmits the encoded image information as a frame at the time of outputting it to a circuit. The size of the frame is changed in accordance with the efficiency in terms of encoding. Namely, after the line-by-line encoding ends, a direct memory access DMA stops to apply interruption. However, when a counter is counted down one by one to attain zero, an encoder 3 checks the transfer time of the DMA to the buffer memory 4. If it is smaller than a comparison value, the DMA stops, and the counter is set to N. Then the destination address of the DMA is shifted to a next block 6 and restarted. The comparison value is initialized. Whereas the transfer time is larger than the comparison value, the DMA is not stopped. Instead, the checked transfer number is added to the comparison value, and the counter is reset to N.

Picture segmenting device

Abstract: PURPOSE:To attain efficient picture segmentation without executing picture data extending processing by forming a control part for controlling the output of picture data inputted on the basis of a control signal obtained from a comparing part and outputting only picture data in an optional area. CONSTITUTION:Inputted compression picture data are converted from the code of compressed picture data into numeral data indicating physical run length by a run length conversion part 7. The converted numeral data are integrated by an integration circuit 8 and the integrated result is compared with a set value stored in a setting part 11 by a vertical comparator 13. When the run length is decided as the one included within a segmented area range by the comparator 13, the output is signified by an output control circuit 16. When the run length indicated by the code is extended over the segmented area, the code of the length obtained by deleting the part other than the area on the basis of an encoding table 14 is used and outputted by an output selecting circuit 15. Consequently, efficient picture segmentation can be attained without requiring a memory of large capacity required for the extending or compressing processing of picture data.

Predictively encoding colour video signals

Abstract: An information data transmission system deals with a plurality of kinds of information data different in quantity from one another and respectively corresponding to prescribed amounts of an information signal. The system has first encoding circuitry for encoding the plurality of kinds of information data and second encoding circuitry for predictively encoding the plurality of kinds of information data. The timing of the production of outputs from the first and second encoding circuits is such that, for all kinds of the plurality of information data, the quantity of information data encoded by the first encoding circuitry is equalized.

Form overlay controller

Abstract: PURPOSE:To reduce the quantity of a program, by storing a bit of form information at a form memory after compressing and encoding the bit of form information developed on an image memory, and developing the bit of form information on the image memory by reading out and expanding the bit of form information accumulated on the memory at every form overlay print of each page. CONSTITUTION:A bit of image information developed on an image memory 27 is read out under the control of a microprocessor 21, and the bit of said image information is supplied to a coder 28, then a compressing process (encoding) is applied on it, and it is written on a form memory 29. Next, a host computer 1 sends a data which becomes a print object to a printer control device 2. The data is written once at a RAM 26 through a host interface part 22, under the control of the microprocessor 21 similarly as the bit of form information. And when the data is a compressed data, it is supplied to a decoder 23 in order, and is expanded to a raw image data, and after that, it is developed on the image memory 27, and is overlapped on the form already developed.

Simple encoding system

Abstract: PURPOSE:To attain miniaturization and cost reduction of the titled system by applying a subsampling on a television signal with a prescribed clock signal, the phase of which is inversed in a cycle not exceeding two lines CONSTITUTION:In a simple encoder system, a MUSE encoder is constituted in a small scale while omitting a field memory and a frame memory which makes it complicate and causes a high cost The MUSE encoder only with subsamplings 8 and 13 is realized in a simplified system A, and the MUSE encoder with the use of the subsamplings 8 and 13, and a simple two-dimensional low-pass filter 11 is realized in a simple type system B Furthermore, in a simple type system C, almost a perfect simple type MUSE encoder in which both simple type systems A and B are combined, is realized by using additionally a movement detector in which a memory capacity is reduced by half and simplified

Image information transfer method for image filing system

Abstract: PURPOSE: To enable to reduce the cost of a whole system by providing an information processing means with an image accumulation means side, transferring image information in a size, a resolution and an encoding system required by an image utilization means and transferring the image information without waste. CONSTITUTION: A retrieval command is issued from a work station 6 to a file server 16. This command is transmitted to the CPU 22 of a control device 15 in the server 16. The corresponding image data is read out from an optical disk deck 14 and stored in an image memory 26 by the CPU 22. Then the image information is read out from the memory 26, returned to raw image information by a decoding circuit 27, converted to the specified size and resolution by an image information conversion circuit 28 and encoded in the specified system by an encoding circuit 29. The operated image information is transferred from a network interface part 31 to the station 6 through a selector 30. In the station 6, the received image information is temporarily stored in the image memory, read out again, returned to the raw image information by the decoding circuit and displayed on a display, for example. COPYRIGHT: (C)1988,JPO&Japio

Predictive coding system

Abstract: PURPOSE:To elevate an encoding efficiency, by using an interframe interpolating prediction, as well without limiting a prediction to an inframe interpolating prediction when an input signal is separated into two screens and the screen of one side is predicted from the screen of other side CONSTITUTION:In a first encoding circuit 2, a signal is quantized and outputted by a quantizer Q, but in this case, a predicted signal is generated by an inframe extrapolating prediction circuit P The input signal to the inframe extrapolating prediction circuit P is inputted to a frame memory 31 in an interpolation value generation circuit 3, and is delayed by one frame portion, and further, is delayed by one frame portion by the frame memory 32 Accordingly, in an interpolation circuit 33, an interframe interpolation predicted signal (signal C) is generated from the input signal X to the frame memory 31 and the output signal Y from the frame memory 32 Besides, in this interpolation circuit 33, an inframe interpolation predictive signal (signal C) can be generated, as well from the output of the frame memory 31

Space saving key-lock access control system (abstract only)

Abstract: In early 1970s the access matrix model for the security of software system was developed [1,2] as a generalized description of operating system protection mechanisms. This matrix is called security matrix, the columns of the matrix represent to some data structures in the system, the rows of the matrix are those potential users of the system, and each element in the matrix is a protection decision, d(i,j), specifying rule that governs the manipulation of the data structure j by user i. The users of the system may be permitted any of a number of different access rights to a data structure such as reading, appending, updating, deletion, execution, and changing protection. A modified access matrix model is used in MULTICS [3] and other virtual memory system.Later in 1984, an access control with single key-lock system was developed [4]. The system involved three matrices namely, assessors key matrix, information locks matrix, and access matrix. Each user has only one key associated with unique lock for each file. For each user and each file there is an access code that represented the permission of user to own, to write, to read, to execute, or not to access the file. The entries of these matrices are non-negative integers and stored in the main memory. However, for a large system that might involve hundreds or thousands of users and a huge number of files. Then, a large memory space is occupied by these three matrices.This research proposes a new technique that converts a number of matrix entries (at least 10) into a rational number and then stored in the memory. When access is requested the appropriate rational number is decoded, through a program, into the unique original matrix entries for the key-lock system to control access of information.The advantages of this new method are: (1) The reduction of the memory space required for the keys, locks, and access codes is at least 80% of the original needs. (2) The techniques of encoding and decoding are simple. (3) The construction of keys and locks still remain as simple as those proposed in [4]. Procedures for encoding and decoding are included and examples are presented.

Picture encoding circuit

Abstract: PURPOSE:To shorten an encoding time by operating simultaneously plural encoders and one control circuit for controlling these encoders in parallel every one line unit. CONSTITUTION:Picture information read by a picture reader 1 is sequentially stored in a frame memory 2 and at the same time, according to the control circuit 5, an odd number line is changed over by the first encoder 3 and an even number line is changed over by the second encoder 4 sequentially to perform an encoding operation. The encoding data of the encoder 3 and the encoding data of the encoder 4 are respectively stored in the first encoding data buffer 6 and in the second encoding data buffer 7. According to the control of the control circuit 5, the encoding data is fed to an output circuit 8 sequentially in the sequence of the encoding data buffer 7 and the encoding data buffer 7. By sequentially changing over the plural encoders every one line unit, the simultaneous encoding with the picture reader can be executed to shorten the encoding time.