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Showing papers on "Insulated-gate bipolar transistor published in 1988"


Journal ArticleDOI
TL;DR: An analytical model for the power Insulated-Gate Bipolar Transistor (IGBT) is developed in this paper, which consistently describes the IGBT steady-state currentvoltage characteristics and switching transient current and voltage waveforms for all loading conditions.
Abstract: An analytical model for the power Insulated-Gate Bipolar Transistor (IGBT) is developed. The model consistently describes the IGBT steady-state current-voltage characteristics and switching transient current and voltage waveforms for all loading conditions. The model is based on the equivalent circuit of a MOSFET which supplies the base current to a low-gain, high-level injection, bipolar transistor with its base virtual contact at the collector end of the base. The basic element of the model is a detailed analysis of the bipolar transistor which uses ambipolar transport theory and does not assume the quasi-static condition for the transient analysis. This analysis differs from the previous bipolar transistor theory in that (1) the relatively large base current which flows from the collector end of the base is properly accounted for, and (2) the component of current due to the changing carrier distribution under the condition of a moving collector-base depletion edge during anode voltage transitions is accounted for. Experimental verification of the model using devices with different base lifetimes is presented for the on-state current-voltage characteristics, the steady-state saturation current, and the current and voltage waveforms for the constant voltage transient, the inductive load transient, and the series resistor-inductor load transient.

231 citations


Journal ArticleDOI
02 Oct 1988
TL;DR: In this article, the power insulated gate bipolar transistor (IGBT) for a series resistor-inductor load, both with and without a snubber, has been simulated.
Abstract: The device-circuit interactions of the power insulated gate bipolar transistor (IGBT) for a series resistor-inductor load, both with and without a snubber, are simulated. An analytical model for the transient operation of the IGBT, previously developed, is used in conjunction with the load circuit state equations for the simulations. The simulated results are compared with experimental results for all conditions. Devices with a variety of base lifetimes are studied. For the fastest devices studied (base lifetime=0.3 mu s), the voltage overshoot of the series resistor-inductor load circuit approaches the device voltage (500 V) for load inductances greater than 1 mu H. For slower devices, though, the voltage overshoot is much less, and a larger inductance can therefore be switched without a snubber circuit (e.g. 80 mu H for a 7.1 mu s device). The simulations are used to determine the conditions for which the different devices can be switched safely without a snubber protection circuit. Simulations are also used to determine the required values and ratings for protection circuit components when protection circuits are necessary. >

120 citations


Journal ArticleDOI
01 Apr 1988
TL;DR: A review of the evolution of a power transistor technology based on MOS gate control is provided in this article, which offers the advantage of very high input impedance, which allows the control of the devices using low-cost integrated circuits.
Abstract: A review of the innovations that have led to the evolution of a power transistor technology based on MOS gate control is provided. This technology offers the advantage of very high input impedance, which allows the control of the devices using low-cost integrated circuits. The physics of operation of the two types of devices in this category, power MOSFETs and power MOS-bipolar devices, are described. Trends in process technology and device ratings are analyzed. Based on the superior performance of these devices, it is projected that they will completely displace the power bipolar transistor in the future. >

75 citations


Patent
19 Jul 1988
TL;DR: A power semiconductor device which comprises either a bipolar transistor or a MOSFET incorporates an integral Schottky diode in antiparallel connection with the transistor for conducting reverse current as mentioned in this paper.
Abstract: A power semiconductor device which comprises either a bipolar transistor or a MOSFET, incorporates an integral Schottky diode in antiparallel connection with the transistor for conducting reverse current through the power semiconductor device. By fabricating the diode to exhibit a lower turn-on voltage, than the P-N junction at the base and collector interface in the bipolar transistor, or at the base and drift layer interface in the MOSFET, the power semiconductor device, when in the reverse conduction mode, exhibits excellent reverse recovery characteristics and without forward voltage overshoot transients.

64 citations


Patent
08 Sep 1988
TL;DR: In this article, a vertical DMOS or IGBT cell structure with an integral operating condition sensor provided by a sensor region forming a PN junction 65 with an adjacent region of the cell and having a sensor regions contact 75 for conducting a test current without interfering with normal operation of a cell is presented.
Abstract: A vertical DMOS or IGBT cell structure with an integral operating condition sensor provided by a sensor region forming a PN junction 65 with an adjacent region of the cell and having a sensor region contact 75 for conducting a test current without interfering with normal operation of the cell.

40 citations


Patent
07 Oct 1988
TL;DR: In this paper, the ON-resistance and turn-off time of an IGBT and FET are controlled by connecting the drain and collector electrodes to one main terminal for the device with a resistor between either the drain region/drift region interface or the collector junction and the main terminal.
Abstract: An IGBT and FET are integrated in a common semiconductor body and share common source/emitter, base and drift regions and an insulated gate electrode. The ON-resistance and turn-off time of this device can be controlled by connecting the drain and collector electrodes to one main terminal for the device with a resistor between either the drain region/drift region interface or the collector junction and the main terminal of the device.

37 citations


Patent
02 Dec 1988
TL;DR: A UMOS IGBT has a source electrode ohmic contact area which is at least 40% base region and preferably at least 50% base regions in order to provide a high latching current and a large safe operating area as mentioned in this paper.
Abstract: A UMOS IGBT has a source electrode ohmic contact area which is at least 40% base region and preferably at least 50% base region in order to provide a high latching current and a large safe operating area.

36 citations


Patent
Akio Tanaka1
24 Oct 1988
TL;DR: In this article, the structure of an insulated gate bipolar transistor with an n-type island formed in a p-type substrate is described, and an integrated circuit is fabricated on the single substrate by virtue of junction isolations.
Abstract: There is disclosed the structure of an insulated gate bipolar transistor which is formed in an n-type island formed in a p-type substrate and comprises an n-type well and a p-type base in the island in a spacing relationship, n-type and p-type source regions in the n-type well, an n-type drain in the base and an extension projecting from the base, and an integrated circuit is fabricated on the single substrate by virtue of the junction isolations.

24 citations


Proceedings ArticleDOI
11 Dec 1988
TL;DR: In this article, the authors discuss the impact of device cell geometry on the safe operating area (SOA) of IGBTs (insulated-gate bipolar transistors), and two-dimensional computer simulations of the electric field distribution and avalanche breakdown have been performed for a variety of cell geometries.
Abstract: The authors discuss the impact of device cell geometry on the safe operating area (SOA) of IGBTs (insulated-gate bipolar transistors). Two-dimensional computer simulations of the electric field distribution and avalanche breakdown have been performed for a variety of cell geometries. Simulation of the square-cell and linear-cell geometries used in previous devices showed that the SOA is determined by a spherical junction formed at the corners of the cells. To circumvent this problem, two cell topologies are proposed: the rounded-end-linear (REL) cell and the atomic-lattice-layout (ALL) cell. With the REL cell, the breakdown voltage is improved to that of a cylindrical junction. With the ALL cell, the breakdown voltage is even further improved to that of a saddle junction. The modeling predicts an improvement in the SOA current density by a factor of 1.9 and 2.6, respectively, and these have been experimentally confirmed. The ALL cell design also reduces the input gate capacitance by half and increases the contact area to the emitter by a factor of 5 over the linear cell geometry. >

18 citations


Journal ArticleDOI
TL;DR: In this paper, an insightful study of static and dynamic latchup in the LIGBT, based on extensive two-dimensional numerical device simulations, is described, and the insight is then used as a basis for developing a physical SPICE-LIGBT model, which is useful for device simulation and design.
Abstract: An insightful study of static and dynamic latchup in the LIGBT, based on extensive two-dimensional numerical device simulations, is described. The insight is then used as a basis for developing a physical SPICE LIGBT model, which is useful for device simulation and design (e.g. for latchup immunity) as well as for power integrated circuit simulation. The basic mechanisms underlying latchup in the LIGBT are identified for various excitations. The significance of the effective p-i-n diode that materializes via the conductivity modulation in the regenerative process is stressed in the simulations, as is the importance of non-quasi-static bipolar transistor behavior, heretofore unrecognized. the SPICE model is supported by measurements of test devices and by the numerical device simulations. >

17 citations


Patent
22 Sep 1988
TL;DR: In this paper, a method for the measurement of thermal resistance in which the collector-emitter voltage of the IGBT is measured before and after a defined power pulse as well as for the determination of the transient thermal resistance by detecting the cooling curve after the power pulse, and specifically by measuring the collector emitter voltage at specific time intervals.
Abstract: It is the object of the invention to specify a method and a measuring device for the determination of the internal thermal resistance and the transient thermal resistance of IGBTs (insulated gate bipolar transistors), which also permits a measurement on IGBTs with a reverse-connected parallel diode. This object is achieved by means of a method for the measurement of thermal resistance in which the collector-emitter voltage of the IGBT is measured before and after a defined power pulse as well as by means of a method for the determination of the transient thermal resistance by means of detecting the cooling curve after the power pulse, and specifically by means of measuring the collector-emitter voltage at specific time intervals. The methods can be carried out with a measuring device connected to a computer. The solution according to the invention can be used for the testing of IGBT modules.

Patent
14 Nov 1988
TL;DR: In this paper, a plurality of bipolar transistors with a freewheeling diode poled in parallel with outputs of the bipolar transistor are used to provide a base drive proportional to current flowing in a load coupled to the bipolar transistor.
Abstract: An inverter in accordance with the present invention includes a plurality of bipolar transistors (102) with each bipolar transistor having a freewheeling diode (108) poled in parallel with outputs of the bipolar transistor, a current transformer (112) in a positive feedback circuit (110) associated with each bipolar transistor causing a positive feedback to be applied from an output of the inverter to a base of each bipolar transistor to provide a base drive proportional to current flowing in a load coupled to the bipolar transistors, a rectifier (120), disposed in each of the positive feedback circuits for permitting current to flow to the base of the bipolar transistor when the bipolar transistor is conductive and blocking flow of current from the base to the emitter when the bipolar transistor is not forward biased.

Proceedings ArticleDOI
02 Oct 1988
TL;DR: In this article, the authors study the short-circuit capability of IGBTs and show that the high current level or active region of the IGBT is different for different manufacturers.
Abstract: The IGBT (insulated-gate bipolar transistor) or COMFET (conductivity-modulated field-effect transistor) has the same low drive requirements as for MOSFETs and the same carrier injection as a bipolar transistor, giving a low voltage drop even at high breakdown voltage ratings. The authors study the short-circuit capability. The high-current level or active region is found for different IGBTs. The short-circuit endurance time is investigated. The measurements show clear differences between the IGBTs from different manufacturers. The gate voltage is shown to be an important parameter. >

Patent
07 Oct 1988
TL;DR: In this article, a system providing a drive circuit for a bipolar transistor high in speed and low in power consumption even under a low source voltage using a MOSFET was described.
Abstract: A system providing a drive circuit for a bipolar transistor high in speed and low in power consumption even under a low source voltage using a MOSFET is disclosed. The base current of the bipolar transistor is supplied not by short-circuiting the collector and the base thereof by a MOSFET but from another base current source.

Proceedings ArticleDOI
J.G. Mansmann1, E.J. Wildi1, J.P. Walden1, K. Fujino, Y. Hasegawa 
11 Apr 1988
TL;DR: In this article, a generic 500 V high-voltage IC with an architecture for driving N-IGBT and/or N-MOSFET power devices organized in a half-bridge configuration is described and its performance shown.
Abstract: A generic 500 V high-voltage IC with an architecture for driving N-IGBT and/or N-MOSFET power devices organized in a half-bridge (phase leg) configuration is described and its performance shown. The circuit's main function is to provide an interface between low-level logic inputs (CMOS) and output power devices. It provides numerous protection features, such as current limiting, prevention of overlap firing, and power supply undervoltage protection. The device has been shown to perform flawlessly in noisy industrial environments. >

Patent
08 Feb 1988
TL;DR: In this paper, a transistor drive circuit includes a driver transistor and a power switching transistor connected in a Darlington configuration which receives turn-on and turn-off signals from a drive transformer.
Abstract: A transistor drive circuit includes a driver transistor and a power switching transistor connected in a Darlington configuration which receives turn-on and turn-off signals from a drive transformer. A capacitor is provided for connection between the driver transistor base and the switching transistor emitter during a turn-off period such that the voltage on the capacitor hastens turn-off of the driver transistor and the switching transistor. A diode connected between the emitter and the base of the driver transistor provides for continuing current flow from the capacitor following turn-off of the driver transistor but prior to turn-off of the switching transistor. After the switching transistor has turned off, the capacitor is recharged prior to the presence of a turn-on signal from the drive transformer.

Patent
27 Sep 1988
TL;DR: A cascode BiMOS driving circuit with an IBGBT (9) connected between a first output terminal (3) and the base of a bipolar transistor (Q1) is described in this article.
Abstract: A cascode BiMOS driving circuit according to the present invention has an IBGBT (9) connected between a first output terminal (3) and the base of a bipolar transistor (Q1). An IGBT generally has a low on-state resistance, and hence a chip area for the IGBT (9) is not so increased, even if the breakdown voltage of the IGBT (9) is made about equal to that of the bipolar transistor (Q1). Thus, a cascode BiMOS driving circuit of low cost and low input capacitance can be implemented. Further, the IGBT (9) is gently turned off due to a so-called tail phenomenon, to prevent an abrupt turn off of the bipolar transistor (Q1), to whereby prevent an occurrence of a surge voltage.

Journal ArticleDOI
01 Oct 1988
TL;DR: In this article, the authors show that self-heating of continuously operated transistors increases the output slope conductance in practical applications, and this is quantitatively to be in agreement with temperature-dependent theory.
Abstract: Improved (constant current) output characteristics of the insulated gate bipolar transistor are theoretically attainable by reducing the minority carrier diffusion length, but the improvements are only observable in practice with low duty cycle or cold (isothermal) curve tracer characteristics. The self-heating of continuously operated transistors increases the output slope conductance in practical applications, and this is shown quantitatively to be in agreement with temperature-dependent theory. The desirable feature of a high output slope resistance of such a MOS-bipolar power device can be adjusted in a controllable manner by application of substrate (body) feedback to a MOSFET driver. This method, which avoids interference with the input impedance of the control gate, has been tested using discrete components in order to demonstrate the feasibility for an integrated power module.

Journal ArticleDOI
TL;DR: In this article, a p-channel vertical DMOSFET structure coupled with a lateral IGBT (insulated-gate bipolar transistors) path is described, where external resistors are placed in series with either the collector terminal (the bipolarenhanced MOSFet (BIENFET) mode) or the drain terminal(the substrate collector-shorted (SCOSH) LIGBT mode) to vary the degree of minority-carrier injection.
Abstract: A p-channel vertical DMOSFET structure coupled with a lateral IGBT (insulated-gate bipolar transistors) path is described. External resistors are placed in series with either the collector terminal (the bipolar-enhanced MOSFET (BIENFET) mode) or the drain terminal (the substrate collector-shorted (SCOSH) LIGBT mode) to vary the degree of minority-carrier injection. This creates the opportunity to obtain a device with externally programmable forward-drop/switching speed tradeoff. The device is shown experimentally to have forward drops close to those of vertical and lateral IGBTs and turn-off times close to that of MOSFETs. Typical forward drops at 93 A/cm/sup 2/ range from 3-4 V and corresponding turn-off times from 4.3 to 0.22 mu s when the drain resistor is varied. This device is considered particularly attractive as a high-frequency and high-voltage power switch. >

Patent
17 Jun 1988
TL;DR: In this article, a pair of power devices connected in parallel are coupled to a small sense resistance, and a large sense resistance is connected to the mirror terminal of the second power device to provide low current sensing capabilities.
Abstract: A current sensing circuit includes a pair of power devices connected in parallel. The mirror terminal of the first power device is coupled to a small sense resistance, and the mirror terminal of the second power device is connected to a large sense resistance. Each mirror terminal is coupled to its own comparator. Small currents are sensed by the comparator coupled to the mirror terminal of the first power device, and large currents are sensed by the comparator coupled to the mirror terminal of the second power device. If multiple mirror terminals are not available, a large sense resistance may be connected to the mirror terminal of the power device, and a small sense resistance may be selectively connected in parallel with the large resistance to provide low current-sensing capabilities. Accuracy of the device is enhanced by circuitry which minimizes the effect of integrated impedance variation and a variation in the low sense resistances.

Patent
17 May 1988
TL;DR: In this paper, the drive circuit for driving a cascode bipolar MOS circuit (1) has a bipolar transistor (21) coupled to a bipolar transistors (11) in the bipolar circuit through a Darlington connection.
Abstract: The drive circuit for driving a cascode bipolar MOS circuit (1) has a bipolar transistor (21) coupled to a bipolar transistor (11) in the bipolar MOS circuit (1) through a Darlington connection. A base current for the bipolar transistor (11) is supplied through the other bipolar transistor (21), without a transformer.

Patent
21 Oct 1988
TL;DR: In this paper, a method and circuit configuration for base current regulation of bipolar transistors in periodic switching operation is introduced, which provides defining as a measure of the saturation of the switching transistor the base current time integral required for sweeping the base region of charge carriers.
Abstract: When triggering a bipolar switching transistor the control current for switching on the bipolar switching transistor must be set properly. If the transistor is oversaturated, the switch-off time response is poor. With too low a control current, however, high forward losses occur. A method and circuit configuration for base current regulation of bipolar transistors in periodic switching operation is introduced. The method provides defining as a measure of the saturation of the switching transistor the base current time integral required for sweeping the base region of charge carriers, and setting as a function of this value the base current for switching on the switching transistor.

Patent
09 May 1988
TL;DR: In this article, the authors proposed a circuit short-circuiting the gate and the emitter if a collector-emitter voltage exceeds a prescribed voltage at its conductive state.
Abstract: PURPOSE:To prevent destruction of a component due to latchup by providing a circuit short-circuiting the gate and emitter if a collector-emitter voltage exceeds a prescribed voltage at its conductive state. CONSTITUTION:If a collector-emitter voltage of an IGBT(Insulated Gate Bipolar Transistor) 11 exceeds a voltage being the subtraction of a voltage of a reverse bias power supply 5b from the sum of the Zener voltage of a Zener diode 7 and a forward voltage drop of a diode formed between the emitter and base of an NPN transistor(TR) 8, the TR 8 is conductive. Then the gate and emitter of the IGBT 11 are short-circuited by the TR 8 and a diode 6b. Since a switch 10b is turned on at normal turn-off, a voltage of the power supply 5b is applied between the collector and emitter of the TR inversely to protect the TR 8.

Patent
30 Aug 1988
TL;DR: In this paper, the output power of an amplifier working in class C mode and comprising at least one bipolar transistor is determined experimentally as a function of output power, the power and frequency of the input signal and the temperature of the bipolar transistor.
Abstract: Disclosed is a device to control the output power of an amplifier working in class C mode and comprising at least one bipolar transistor. The bias resistance of the bipolar transistor is made variable through the presence of a field effect transistor, to the gate of which is applied a voltage Vgs, chosen from a set of values that are determined experimentally as a function of the output power to be obtained, the power and frequency of the input signal and the temperature of the bipolar transistor.

Proceedings ArticleDOI
02 Oct 1988
TL;DR: In this article, it is shown that it is possible to extend the power range of high-frequency transistor inverters into the kilowatt region by introducing: (1) simple but effective relief of bipolar transistor switching stresses; (2) reduction and containment of transistor storage times at turn-off; and (3) effective design of the transformer and effective electromagnetic layout of the inverter.
Abstract: It is shown that it is possible to extend the power range of high-frequency transistor inverters into the kilowatt region by introducing: (1) simple but effective relief of bipolar transistor switching stresses; (2) reduction and containment of transistor storage times at turn-off; and (3) effective design of the transformer and effective electromagnetic layout of the inverter. The authors first examine switching stress relief in the transistors of the inverter by previously proposed nondissipative snubbing methods, since this is a prerequisite to increasing inverter power levels. They then propose a novel nondissipative snubbing concept, which is applied to self-oscillating inverters with magnetic feedback and center-tap topology. The combined circuit is then developed further for a converter with saturation of the main transformer or saturation of the base drive transformer. This is also done for these converters in a bidirectional configuration. Enhancement of bipolar transistor turn-off and optimized electromagnetic design of the electromagnetic components and layout of the topology, which completes the development of a simple, low-cost converter configuration, are discussed. >

Patent
20 Oct 1988
TL;DR: In this article, the authors proposed to simplify the circuit constitution by providing a common gate drive circuit receiving a control signal isolated by a photocoupler so as to reduce the number of power supplies for gate drive circuits.
Abstract: PURPOSE:To simplify the circuit constitution by providing a common gate drive circuit receiving a control signal isolated by a photocoupler so as to reduce number of power supplies for gate drive circuit into two and using a control signal isolator only thereby reducing number of circuit components. CONSTITUTION:An N-channel IGBT (insulated gate bypolar transistor) 9a is used for the upper arm, a P-channel IGBT 17 is used for the lower arm, the emitters are connected incommon to form a half bridge connection circuit of complementary configuration. A drive signal, being isolated by a photocoupler 5a, is given and one power supply in forward/reverse bias power supplies 8a, 8b of the gate drive circuit 6c is used for the forward bias of the IGBT 9a and the reverse bias power supply of the IGBT 17 and the other power supply acts like being the reverse bias power supply of the IGBT 9a and the forward bias power supply of the IGBT 17. Thus, the number of power supplies for the gate drive circuit is decreased into two and the function is attained by one control signal isolation.

Patent
26 Apr 1988
TL;DR: In this paper, the authors propose to detect the overcurrent state inexpensively by supervising the on-voltage of an IGBI (Insulated Gate Bipolar Mode Transistor) and discriminating it when the onvoltage exceeds a prescribed value.
Abstract: PURPOSE:To detect the overcurrent state inexpensively by supervising the on- voltage of an IGBI (Insulated Gate Bipolar Mode Transistor) and discriminating it the overcurrent state when the on-voltage exceeds a prescribed value. CONSTITUTION:The emitter-collector voltage of the IGBT1 is supervised by a capacitor 16 and whether or not the voltage exceeds a prescribed value is detected by a Zener diode 15, and when the voltage exceeds the prescribed value, a transisor (TR)14 is turned on and a TR 13 is turned off to protect the IGBT. Moreover, when overcurrent occurs, the electric charge stored in the capacitor 16 is discharged through a resistor 19 and it is executed by using a reset switch 21 to drive a photocoupler 20. Moreover, a series circuit compris ing a diode 9, a Zener diode 10 and a diode 9' and a Zener diode 10' is used to discharge the energy stored in the primary coil of pulse transformers 4, 4'.

Proceedings ArticleDOI
Sandip Tiwari1
07 Jun 1988
TL;DR: In this article, the progress and basic considerations for the heterostructure bipolar transistor and its digital and analog circuits are reviewed, with attention given to the highest speeds of any semiconductor device and a large level of integration, including the first implementations of compound semiconductor devices in microprocessors.
Abstract: The author reviews the progress and basic considerations, and investigates the trends, for the heterostructure bipolar transistor and its digital and analog circuits. The state of the art is reviewed, with attention given to the highest speeds of any semiconductor device and a large level of integration, including the first implementations of compound semiconductor devices in microprocessors. This is followed by a critique of technology trends and future directions, and a summary of scaling considerations of the device. Emphasis is placed on the GaAlAs-GaAs heterostructure system. >

Patent
26 Apr 1988
TL;DR: In this article, the authors proposed a voltage reduction circuit for an IGBT (Insulated Gate Bipolar Mode Transistor) within its safe operating region by decreasing its gate voltage to a prescribed limit value if a prescribed value or over of voltage is applied between the collector and emitter when the IGBT is turned on.
Abstract: PURPOSE:To attain the operation of an IGBT (Insulated Gate Bipolar Mode Transistor) within its safe operating region by providing a voltage reduction circuit decreasing its gate voltage to a prescribed limit value if a prescribed value or over of voltage is applied between the collector and emitter when the IGBT is turned on. CONSTITUTION:Resistors 22b, 22c are connected between the collector and emitter of the IGBT 3 and a base of a transistor (TR) 23 is connected to a connecting point P of the resistors 22b, 22c and since the potential of the connecting point P is low when the IGBT 3 is turned on, the TR 23 is not conductive. On the other hand, if short-circuiting the like takes place and a prescribed value of the voltage or over is applied between the collector-emitter of the IGBT, since the potential at the point P rises, the TR 23 is conductive. Thus, a Zener diode 24 is inserted between the gate and emitter of the IGBT 3 via the TR 23 and the gate-emitter voltage (gate voltage) is limited to a prescribed level decided by the Zener voltage.

Proceedings ArticleDOI
24 Oct 1988
TL;DR: The switching performance and c h a r a c t e r i s t i c s of both T h e g t o t h y r i S t o r and b i p o l a r t r a n i n g vol tages were improved by using the switched emitter technique as discussed by the authors.
Abstract: The switching performance and c h a r a c t e r i s t i c s of both t h e g t o t h y r i s t o r and b i p o l a r t r a n s i s t o r a r e s i g n i f i c a n t l y improved by t h e use of t h e switched emitter technique. breakdown and t h e technique r e s u l t s i n s h o r t e r s a t u r a t i o n de lay times, f a s t e r c u r r e n t f a l l times and h igher s u s t a i n i n g vol tages . performance is t r a d e d f o r increased d r i v e c i r c u i t complexity and increased o n s t a t e loss a s s o c i a t e d with two series connected power switches. c i r c u i t techniques and f e a t u r e s of t h e two 720 Vdc, 320 A cascode switches a r e considered. Feedback and c o n t r o l l o g i c aspec ts p e r t a i n i n g t o t h e minimization of power c i r c u i t no ise which i s i n j e c t e d i n t o t h e c o n t r o l c i r c u i t r y a r e a l s o considered. Turn-off occurs without second This improved switching The s o p h i s t i c a t e d