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Showing papers on "Sampling (signal processing) published in 1994"


Journal ArticleDOI
TL;DR: In this article, the effects of thermal and pileup noise in liquid ionization calorimeters operating in a high luminosity environment are studied. And the authors present the results of a study of the effect of thermal noise on the performance of pre-filter shaping.
Abstract: We present the results of a study of the effects of thermal and pileup noise in liquid ionization calorimeters operating in a high luminosity environment. The method of optimal filtering of multiply-sampled signals to obtain timing and amplitude from calorimeter signals is described. This method has some advantages over the traditional method of sampling the peak of a shaped signal, which include a reduced sensitivity to channel-to-channel variations in the pre-filter shaping parameters and good performance over a wide range of operating conditions. Analytic expressions for the variance of amplitude and timing measurements are found through a frequency domain approach. Implications for the choice of pre-filter shaping time, number and position of the samples, and digitization accuracy are discussed.

278 citations


Patent
22 Nov 1994
TL;DR: In this article, a receiver for pseudorandom noise (PRN) encoded signals consisting of a sampling circuit, multiple carrier and code synchronizing circuits, and multiple digital correlators is presented.
Abstract: A receiver for pseudorandom noise (PRN) encoded signals consisting of a sampling circuit, multiple carrier and code synchronizing circuits, and multiple digital correlators. The sampling circuit provides digital samples of a received composite signal to each of the several receiver channel circuits. The synchronizing circuits are preferably non-coherent, in the sense that they track any phase shifts in the received signal and adjust the frequency and phase of a locally generated carrier reference signal accordingly, even in the presence of Doppler or ionospheric distortion. The multiple correlators in each channel correlate the digital samples with locally generated PRN codes having multiple offsets, to produce a plurality of correlation signals. The plurality of correlation signals are fed to a parameter estimator, from which the delay and phase parameters of the direct path signal, as well as any multipath signals, may be estimated, and from which a range measurement may be corrected.

225 citations


Journal ArticleDOI
TL;DR: In this article, a recursive algorithm for real-time digital pulse shaping in pulse height measurements has been developed, where the differentiated signal from the preamplifier (exponential pulse) is amplified and then digitized.
Abstract: Recursive algorithms for real-time digital pulse shaping in pulse height measurements have been developed. The differentiated signal from the preamplifier (exponential pulse) is amplified and then digitized. Digital data are deconvolved so that the response of the high-pass network is eliminated. The deconvolved pulse is processed by a time-invariant digital filter which allows trapezoidal/triangular or cusp-like shapes to be synthesized. A prototype of a digital trapezoidal processor was built which is capable of sampling and processing digital data in real time at clock rates up to 50 MHz.

219 citations


Patent
03 May 1994
TL;DR: In this paper, a phase shifting transformer function is used to phase shift the lower and upper sidebands of the data signal so that the sidebands have a 180° phase shift with respect to each other.
Abstract: A system and method for modulating a data signal uses a phase shifting transformer function to phase shift the lower and upper sidebands of the data signal so that the sidebands of the data signal have a 180° phase shift with respect to each other (i.e., are complementary). The phase shifted sidebands are added to a standard video signal and then transmitted. A television or other video receiver demodulates the video signal with a simple demodulator circuit, which causes the upper and lower sidebands to be summed together. The data signal, with complementary sidebands, cancels out so that the data signal does not interfere with normal video operation. The upper and lower sidebands of the data signal are processed separately from the video processing circuitry of the television receiver. An inverse phase shifting circuit performs a second phase shift operation on the upper and lower sidebands of the data signal so that the data signal can be demodulated and the data signal recovered.

142 citations


Journal ArticleDOI
TL;DR: An algorithm is presented for real-time estimation of the frequency and azimuth and elevation angles of each signal incident on an airborne antenna array system over a very wide frequency band (2-18 GHz) commensurate with electronic signal warfare.
Abstract: An algorithm is presented for real-time estimation of the frequency and azimuth and elevation angles of each signal incident on an airborne antenna array system over a very wide frequency band (2-18 GHz) commensurate with electronic signal warfare. The algorithm provides unambiguous frequency estimation despite severe temporal undersampling necessitated by cost/complexity of hardware considerations. The 2-18 GHz spectrum is decomposed into 1-GHz bands. The baseband output of each antenna is sent through two 250-MHz sampled channels where one is delayed relative to the other (prior to sampling) by 0.5 ns, which is the Nyquist interval for a 1-GHz bandwidth. Due to the high variance of the Direct ESPRIT frequency estimator, aliased frequencies are estimated via a simple formula and translated to the proper aliasing zone, utilizing eigenvector information generated by PRO-ESPRIT. The algorithm also provides unambigous 2-D angle estimate over the entire 2-18 GHz bandwidth, despite severe spatial undersampling at the higher end of this band necessitated by mutual coupling considerations and resolving power requirements at the lower end of the band. Eigenvector information generated by PRO-ESPRTT is used to facilitate computationally simple estimation of azimuth and elevation angles that are automatically paired with corresponding frequency estimates despite aliasing. Simulations are presented demonstrating the capabilities of the algorithm. >

126 citations


Journal ArticleDOI
TL;DR: It is shown that the sampling rate need not be an exact multiple of the symbol rate, i.e., the samples can be taken from a free-running oscillator, and time-discrete algorithms suitable for fully digital receivers are discussed.
Abstract: We consider the joint sequence estimation, timing and phase recovery for linear modulation. The paper differs from the classical ones in the sense that time-discrete algorithms suitable for fully digital receivers are discussed. Sufficient conditions are given such that the signal samples represent sufficient statistics. These conditions involve signal bandwidth, sampling/symbol rate and the analog prefilter characteristics. It is shown that the sampling rate need not be an exact multiple of the symbol rate, i.e., the samples can be taken from a free-running oscillator. All subsequent signal processing operations in the receiver then operate with the clock of this free-running oscillator. Timing recovery is then performed by a time-variant linear digital interpolator and a decimator. Carrier recovery and sequence estimation are performed at an average rate of one symbol per sample. The digital matched filter for this case is derived for an arbitrary colored noise spectrum. >

111 citations


PatentDOI
Akihisa Kawamura1, Masaharu Matsumoto1, Hiroko Numazu1, Mikio Oda1, Ryou Tagami1 
TL;DR: A sound field controller for reproducing a sound field with presence is presented, which combines a signal extracting circuit for receiving and processing the audio signal, and an operation circuit for performing the convolution on the extracted signal.
Abstract: According the present invention, a sound field controller for reproducing a sound field with presence comprising; input terminals for inputting an audio signal having a first and a second channel signals, a signal extracting circuit for receiving and processing the audio signal, and producing an extracted signal of the audio signal, an operation circuit for receiving the extracted signal from the signal extracting circuit, performing the convolution on the extracted signal, and generating a convolution sum signal, a delay circuit for delaying the convolution sum signal by a predetermined time, and producing a delayed signal, an adding circuit for receiving the audio signal and the delayed signal, and adding the audio signal and the delayed signal with a predetermined summation ratio to produce a summed signal, and output terminals for reproducing the summed signal to localize a sound image in a desirable direction.

90 citations


Journal ArticleDOI
TL;DR: Electronic speckle photography offers a simple and fast technique for measuring in-plane displacement fields in solid and fluid mechanics and random errors are mainly dependent on the effective ƒ-number of the imaging system and Speckle decorrelation introduced by object displacement.
Abstract: Electronic speckle photography offers a simple and fast technique for measuring in-plane displacement fields in solid and fluid mechanics Errors from undersampling, illumination divergence, and displacement magnitude have been analyzed and measured The nature of the systematic error is such that a drift toward the closest integral pixel value is introduced Because of the finite extent of the sensor area, considerable undersampling is tolerable before systematic errors occur The random errors are mainly dependent on the effective ƒ-number of the imaging system and speckle decorrelation introduced by object displacement When sampling at a rate of ~ 70% of the Nyquist frequency, we avoided systematic errors and minimized random errors

85 citations


Patent
23 Jun 1994
TL;DR: In this article, a channel estimation filter is used to adapt the channel estimate and also to generate weight factors, where the coefficients of the prefilter are generated as a function of the estimated channel and the weight factors.
Abstract: In a digital signal transmission system, a receiver receives a signal, wherein the signal bandwidth of the system exceeds the system symbol rate. A correlation and sampling circuit receives a baseband signal, samples the signal eight times per symbol time, correlates, generates a channel estimate and down-samples the sampled signal to form an observed signal. This signal is filtered in a prefilter, whose output is sampled at symbol rate and the obtained signal is delivered to a channel equalizer which performs a viterbi algorithm with non-quadratic metric calculation and generates estimated symbols. A channel estimation filter receives a symbol sequence which contains alternate zero-value symbols and the estimated symbols and generates an estimated signal. An error signal is generated and used to adapt the channel estimate and also to generate weight factors. The coefficients of the prefilter are generated as a function of the channel estimate and the weight factors. Coefficients are generated in a metric calculation filter, by convolving the channel estimate with the prefilter and are used to generate the estimated symbols. The transmission channel, excluding the prefilter, is estimated explicitly so as to enable fast channel changes to be followed. The use of the weight factors enables a short channel estimate to be used. The insertion of the zero-value symbols simplifies adaptation of the channel estimate.

81 citations


Patent
21 Nov 1994
TL;DR: In this paper, a method for defining and writing parallel and concentric magnetic signal tracks to a spinning disk surface of a magnetic data storage disk drive system using the components of the Head Disk Assembly (HDA) implemented by an appropriately programmed digital signal central processing unit (CPU) or micro code in an integrated circuit (IC) and a digital signal random access memory RAM is described.
Abstract: A method for defining and writing parallel and concentric magnetic signal tracks to a spinning disk surface of a magnetic data storage disk drive system using the components of the Head Disk Assembly (HDA) implemented by an appropriately programmed digital signal central processing unit (CPU) or micro code in an integrated circuit (IC) and a digital signal random access memory RAM is described wherein an initial magnetic signal track is written under least (minimum) energy equilibrium conditions with undulating boundaries and a meandering center line relative to axes of the spinning disk surface for one revolution of the surface. Then servoing to an edge of the just written track, a digitized position signal table is created in memory for storing digital position signals representing the amplitude of the signals read from n sampling points per disk revolution over a number of disk revolutions, where n is determined with reference to `Nyquist criteria`. A comparison/demand signal is derived by the CPU for input to the serve controller for each sampling point by first obtaining a target position signal comprising an average of the digitized position signals stored in the memory table and the just read digitized signal for that sampling point and by then comparing that target position signal to the just read digitizing position signals. The resulting current command signal energizing the actuator is normalized, and variation therein thereafter clamped in steps to bring the slider head to a quiet, least energy equilibrium or coast status relative to the spinning disk surface. A second memory table is generated and stores coast digital position signals for the n sampling points for a plurality of coast or least energy disk revolutions. Servo position then is initiated using averaged values in the second memory table such that any position error signal command to the actuator is a response to random noise or forces. Then preserving the least energy equilibrium state to the extent possible, a subsequent track of servo burst pattern is written onto and around the disk and the procedure repeated referencing the edge of the newly written track. A fiducial track concentric with the axes of the spinning disk is defined by each two iterations of the procedure after writing of the initial track. In this manner track densities in excess of 10,000 tracks per inch (track pitches<100 μin.) can be reliably achieved.

78 citations


Patent
16 Aug 1994
TL;DR: In this article, a sampling circuit for processing the chroma signal in an offset sub-sampling fashion was proposed, where a burst signal was used to detect a phase of a chroma phase.
Abstract: A video signal recording apparatus in which a chroma signal contained in a video signal is down-converted and then recorded on a predetermined recording medium comprises a sampling circuit for processing the chroma signal in an offset sub-sampling fashion, wherein the chroma signal sampled by the sampling circuit is recorded on the recording medium and a burst signal for detecting a phase of the chroma signal is not sub-sampled and then recorded on the recording medium.

Journal ArticleDOI
TL;DR: In this article, a pulsed ultrasonic distance measurement system (UDMS) for use in air is described, which is based upon the transmission of a binary-frequency shift-keyed (BFSK) signal followed by data acquisition and signal processing of phase-digitized information from the received signal.
Abstract: A pulsed ultrasonic distance measurement system (UDMS) for use in air is described. A new method of timing is presented that is based upon the transmission of a binary-frequency shift-keyed (BFSK) signal followed by data acquisition and signal processing of phase-digitized information from the received signal. The method reduces many of the problems that arise when dealing with the nonideal behavior of ultrasonic transducers. One of the major advantages is the ease with which the method may be implemented while maintaining high accuracy, since amplitude sampling is not required. Comparison with common ranging techniques is presented, which shows the inherent noise immunity of the new method. A test setup is described, and results given, demonstrating the underlying principle and accuracy. The system measures distances of up to 5000 mm with an accuracy of /spl plusmn/1 mm. >

Journal ArticleDOI
TL;DR: Boddeke et al. as mentioned in this paper proposed a three-phase autofocus algorithm that works well in fluorescence and bright field microscopy using a CCD camera with pixels of 68.
Abstract: Frank R Boddeke, Lucas J van Vliet, Hans Netten and Ian T YoungPattern Recognition Group of the Faculty of Applied PhysicsDelft University of TechnologyLorentzweg 1, 2628 CJ Delft, The NetherlandsAbstractIn the literature many autofocus algorithms have been proposed and compared (Groen et al 1985;Firestone at al 1991; Yeo et al 1993; Price and Gough 1994) for use in optical microscopy (brightfield and fluorescence microscopy) Most of the focus criteria measure the high frequency contents ofa recorded image as a measure of focus In this paper we show that a focus criteria should measure thesignal power of the middle frequency, since defocusing mainly reduces the frequencies around halfthe cut-off frequency of the optical system The filter that provides the required band–pass filteringdepends strongly on the sampling density of the camera There are two practical combinations ofsampling density and one-dimensional digital band-pass filter:• Sampling at the Nyquist frequency and the {1,0,–1} filter;• Sampling at half the Nyquist frequency and the {1,–1} filterThe latter is to be preferred due to noise considerations and the fact that it uses four times fewersample points Calculation speed can also be increased by further reducing the sampling densityperpendicular to the filter (on chip or in software) down to 1/8 of the Nyquist frequency We havedesigned a three-phase autofocus algorithm that works well in fluorescence and bright fieldmicroscopy The phases are:• Coarse, find the region near focus (step size of typically a few microns);• Fine, find a quadratic region around focus (step size around one micron);• Refine, use a quadratic fit on samples around the peak to find the in-focus positionWe found that the final focus error is smaller than the mechanical reproducibility of our z-axis (50nm) for light levels down to 400 photo-electrons per pixel (sampling at the Nyquist frequency using acooled CCD camera with pixels of 68

Patent
31 Mar 1994
TL;DR: In this paper, an analog low pass filter was used for anti-aliasing, and the sampled data was processed by a digital filter on a line-by-line basis.
Abstract: A processing unit (13) for providing secondary images in a video display system (10) in accordance with a choice of scaling ratios. The processing unit (13) scales the luminance component of an analog input signal by first using an analog low pass filter (22) for anti-aliasing, and then sampling (23) the data at a rate appropriate for the selected scaling ratio. The sampled data is processed by a digital filter (24), on a line-by-line basis, which provides weighted average values derived from the sampled data, on a line-by-line basis. A formatter (25) combines sampled chrominance data with the filtered luminance data, and selects lines for inclusion in the secondary image.

Journal ArticleDOI
T. Itakura1
01 Aug 1994
TL;DR: In this article, the effects of sampling pulse width and storage capacitor resetting are taken into account in the analysis of sample-and-hold circuits for LCD driver ICs, where the required signal bandwidth is much wider than the Nyquist rate.
Abstract: Frequency characteristics, especially at high frequency, are important in applications such as sample-and-hold circuits for LCD driver ICs where the required signal bandwidth is much wider than the Nyquist rate. The frequency characteristics of a sample-and-hold circuit using analogue switches have hitherto been estimated from the frequency characteristics of a simple RC circuit comprising a storage capacitor and the on-resistance of the analogue switch. However, the effects of sampling pulse width and storage capacitor resetting are not taken into account. By giving an exact frequency-domain analysis of sample-and-hold circuits, the paper clarifies the limitations of conventional RC estimates. It also reveals the effects of storage capacitor resetting. A narrower pulse causes more ripples in the frequency characteristics. Storage capacitor resetting alleviates these ripples although the DC gain deteriorates for a narrow sampling pulse. This analysis was verified by simple experiments. A design for an LCD driver IC is also described as an application example.

Patent
21 Dec 1994
TL;DR: In this article, the authors propose a data detecting apparatus for detecting desired data from a digital signal comprising a first sampling circuit for sampling the digital signal to output samples, an interpolating circuit for interpolating signal values between the samples outputted from the first sampled circuit, and a second sampling circuit, which matches a phase of a point at which the desired data exists.
Abstract: A data detecting apparatus for detecting desired data from a digital signal comprising a first sampling circuit for sampling the digital signal to output samples, an interpolating circuit for interpolating signal values between the samples outputted from the first sampling circuit, and a second sampling circuit for extracting those signal values interpolated by the interpolating circuit which match a phase of a point at which the desired data exists. This constitution allows to implement all blocks making up the data detecting apparatus with digital signal processing circuits synchronously operating on the a clock, detecting the reproduced signal data without being affected by jitters contained in reproduced signals coming from a channel. The constitution also makes it possible to form on a single LSI chip such circuits including the data detecting apparatus, an ECC decoder, a controller, and an interface circuit as conventionally formed on discrete chips. This permits a compact implementation of an entire apparatus and reduces its production cost. Further, this constitution facilitates the design and test for implementing the embodiment on large scale integrations and eliminates the necessity for externally attached analog parts, making the implementation free of adjustment and less susceptible to aging.

Proceedings ArticleDOI
R.H. Walden1
16 Oct 1994
TL;DR: This presentation surveys the state-of-the-art for ADCs and includes both experimental converters and commercially available parts and provides insight into ADC performance limitations.
Abstract: Analog-to-digital converters are ubiquitous, critical components of signal processing systems. This presentation surveys the state-of-the-art for ADCs and includes both experimental converters and commercially available parts. The shape of the distribution on a resolution vs. sampling rate graph provides insight into ADC performance limitations. For sampling frequencies ranging from /spl sim/0.5 MSPS to /spl sim/4 GSPS, resolution falls off by /spl sim/1 bit for every doubling of the sampling rate. This effect can be related to aperture jitter. For ADCs operating at /spl ges/4 GSPS, the speed of the device technology is a limiting factor. In order to push back these limits, many ADC architectures have been proposed and implemented.

Patent
12 Dec 1994
TL;DR: In this paper, an improved semblance processing technique is used to calculate the semblance function over a time window utilizing coarse slowness and time sampling steps, depending on the parameters of the bandpass filter and the inter-receiver spacing.
Abstract: Methods for processing sonic logging data obtained by a sonic imaging tool or an MWD tool are provided. The sonic logging data are bandpass filtered and sampled according to techniques such as integer band decimation, quadrature modulation, and single side band modulation to provide compressed signals which can be reconstructed if desired. The compressed signals are alternatively stored for downloading and further processing, sent uphole for processing, or processed downhole. The processing preferably involves processing the analytic portion of the compressed signals according to an improved semblance processing technique where the semblance function is calculated over a time window utilizing coarse slowness and time sampling steps. The slowness and time sampling steps are dictated by the parameters of the bandpass filter and the inter-receiver spacing of the tool. The waveform for each receiver is preferably interpolated based on the time step size to provide those data points necessary for stacking. From the determined semblance peaks, or interpolation thereabout, the formation slowness is derived.

Patent
21 Oct 1994
TL;DR: In this paper, a timing recovery circuit is proposed to recover the timing from sparse timing information in multi-level or partial response codes, which includes a switch for sampling an incoming line code signal according to a selectable sample rate, a feed forward equalizer for filtering the sampled signal, a decision feedback equaliser for cancelling intersymbol interference in the filtered signal and for recovering the timing in sampled signal.
Abstract: A timing recovery apparatus for recovering the timing from sparse timing information in multi-level or partial response codes. The timing recovery apparatus includes a switch for sampling an incoming line code signal according to a selectable sample rate, a feed forward equalizer for filtering the sampled signal, a decision feedback equalizer for cancelling intersymbol interference in the filtered signal and for recovering the timing in the sampled signal. The timing recovery circuit creates a phase correction signal in response to a signal received from the feed forward equalizer and thereby control the sample rate of the sample switch so that the signal-to-noise ratio at the node before the decision is maximized. The voltage controlled crystal oscillator may be controlled within a certain frequency range by using a second phase detector which compares the phase of the signal controlling the sampling of the incoming line code with a reference clock.

Patent
04 Oct 1994
TL;DR: In this paper, an in-situe chemical gas or fluid analyzer for vehicles, industrial, environmental and process control applications is presented. And the analyzer includes: (i) a source of electromagnetic radiation (14, 16); and (ii) a sampling cell (12) which collects emission gases of interest and which is capable of withstanding hostile environments while preserving a "clear" optical path between the sensor sampling cell and the source of radiation.
Abstract: An in-situe chemical gas or fluid analyzer for vehicles, industrial, environmental and process control applications. As applied to a vehicle (1) having an internal combustion engine, the analyzer includes: (i) a source of electromagnetic radiation (14, 16); and (ii) a sampling cell (12) which collects emission gases of interest and which is capable of withstanding hostile environments while preserving a "clear" optical path between the sensor sampling cell and the source of radiation. The analyzer further includes: (iii) a solid state sensor (24, 26, 28, 30, 32 ) of monolithic construction which selectively detects electromagnetic radiation that is absorbed or emitted by one or more chemical species of interest, that compensates for temporal and spatial variations in illumination level provided by the source, and that provides an electrical signal output, in either analog or digital format, that is related to the measured concentrations. The sensor includes, in combination, a plurality of highly sensitive electromagnetic radiation detectors (26), spectral filters (24) which may utilize multiple layers of deposited dielectric thin films and/or selectively absorbing layers, and low noise electronics which performs a variety of functions including amplification (28), multiplexing (30), analog to digital (A/D) conversion (33), signal processing (32), and input/output (I/O). In a presently preferred embodiment each radiation detector is a thermopile detector that is integrated upon a common substrate with the support electronics and an associated optical bandpass filter.

Patent
22 Mar 1994
TL;DR: In this paper, a method for determining whether a current state of a process variable output signal is within acceptable limits is presented, which is based on establishing reference data by sampling a plant's process variable signal when the plant is operating at steady state and analyzing the sampled output signal to derive normalized reference data including an energy content of each of a plurality of frequency components of the sampled signal.
Abstract: A method for determining whether a current state of a process variable output signal is within acceptable limits includes the following steps: establising reference data by sampling a plant's process variable output signal when the plant is operating at steady state and analyzing the sampled output signal to derive normalized reference data including an energy content of each of a plurality of frequency components of the sampled output signal. The procedure establishes a current operational data base by sampling a process variable signal when the plant is in operation. The sampled current output signal is analyzed to derive current data including a normalized energy content of each of a plurality of its frequency components. For each common frequency component of the reference data and the current data, the procedure compares their normalized energy contents and issues a non-steady state signal if the comparison indicates that the compared energy contents exceed a predetermined limit.

Patent
16 Sep 1994
TL;DR: AFC circuit for QPSK demodulator including, a circuit for obtaining quadrature related detection signals by multiplying a modulated input signal with quadratures related local oscillation frequency signals from a Quadrature phase local oscillator, digital converter for converting the detection signals into corresponding digital signals by sampling them with a clock which has a frequency two times higher than a symbol rate of the input signal, frequency error detecter for detecting a frequency error between the digital signals using a symbol timing sample value and a symbol intermediate timing sample values in the converted digital signals, first
Abstract: AFC circuit for QPSK demodulator including, a circuit for obtaining quadrature related detection signals by multiplying a modulated input signal with quadrature related local oscillation frequency signals from a quadrature phase local oscillator, digital converter for converting the detection signals into corresponding digital signals by sampling them with quadrature related clocks which have a frequency two times higher than a symbol rate of the input signal, frequency error detecter for detecting a frequency error between the quadrature related digital signals using a symbol timing sample value and a symbol intermediate timing sample value in the converted digital signals, first validity determinator for determining whether the frequency error signal is valid or not through a detection of the pattern of the modulated input signal from sample values before and after the symbol timing so as to result a first validity signal, second validity determinator for deetermining whether the frequency error signal is valid or not through a detection of an absolute sample value of the symbol intermediate timing so as to result a second validity signal, and valid frequency error extractor for extracting the frequency error signal as a frequency control signal for controlling the oscillation frequency of the local oscillator when the frequency error signal has been proved to be valid by the first and the second validity signals.

Patent
02 Dec 1994
TL;DR: A QAM demodulator that samples an IF input modulated with data at a fractional complex sampling rate between one and two times the data rate was proposed in this paper.
Abstract: A QAM demodulator (400) that samples an IF input modulated with data at a fractional complex sampling rate between one and two times the data rate. The use of a fractional sampling rate significantly reduces the number of components necessary to implement the demodulator, particularly in the equalizer section (414, 416) of the demodulator (400) which corrects for channel distortion. The fractional sampling rate demodulator architecture of the invention provides a significant reduction in integrated circuit surface area needed in a VLSI implementation.

Patent
Carl G. Scarpa1
17 Jan 1994
TL;DR: In this article, an implementation of an efficient digital timing recovery circuit capable of being implemented without the use of multipliers is presented. But this circuit is not suitable for analog to digital (A/D) systems.
Abstract: An implementation efficient digital timing recovery circuit capable of being implemented without the use of multipliers. The circuit includes a voltage controlled crystal oscillator ("VCXO"), a signal generator, a non-linear operation circuit, a digital bandpass filter, a bi-quadratic filter, a digital phase lock loop circuit (DPLL) and a zero crossing detector circuit. The circuit implements a spectral line extraction technique for symbol timing recovery. A signal is received by a tuner, passed through an analog to digital converter, whose sampling rate is controlled by the timing recovery circuit, and is then supplied to a Nyquist filter. The In-phase and quadrature-phase signals output by the Nyquist filter are passed through the non-linear operation circuit to produce a signal which is then passed through the bandpass filter and then the bi-quadratic filter which has a passband centered at the symbol rate of the received signal. A quadrature output signal of the bi-quadratic filter is cross-correlated with an internal signal, generated by the signal generator as a function of the sampling rate, to produce a frequency error signal. The DPLL circuit receives the frequency error signal and uses it to generate a control signal to control the sampling rate of the A/D converter. The DPLL circuit adjusts the sampling rate until the bi-quadratic filter's output is phase locked to the output signal of the internal signal generator. A symbol decision clock signal is generated by the zero crossing detector from the signal generator.

Patent
Richard T. Beherns1
17 Nov 1994
TL;DR: In this article, a PID filter is employed in a timing recovery phase-locked loop (PLL) for synchronizing the sampling of a read signal from a magnetic read head in a sampled amplitude read channel for magnetic recording.
Abstract: A PID filter employed in a timing recovery phase-locked loop (PLL) for synchronizing the sampling of a read signal from a magnetic read head in a sampled amplitude read channel for magnetic recording. In addition to a proportional and integral term, the PID filter comprises a derivative term to decrease the settling time of the PLL by increasing the phase margin and damping. Consequently, the PLL locks onto the acquisition preamble in a shorter period thereby reducing the necessary preamble length and maximizing storage area for user data. The derivative term of the loop filter is disabled during tracking mode in order to attenuate noise in the phase error and to reduce gain variance associated with tracking arbitrary user data. The structure of the PID loop filter is transformed into an alternative structure in order to minimize the computation path latency between delay registers to avoid limiting the speed of the read channel. To defeat possible harmonic lock conditions caused by non-linearities in the phase-locked loop, a frequency error is added to the accumulation path (integrating path) of the PID filter. A further transformation provides better range and resolution for the PID filter coefficients.

Patent
27 May 1994
TL;DR: In this paper, a matrix type display apparatus with pixel electrodes arranged in a matrix, data signal lines and scanning signal lines for driving the pixel electrodes, and a data signal line driving circuit is described.
Abstract: A matrix type display apparatus includes pixel electrodes arranged in a matrix, data signal lines and scanning signal lines for driving the pixel electrodes, and a data signal line driving circuit. The data signal line driving circuit includes sampling capacitors for keeping sampled data obtained by sequentially sampling image data over one horizontal scanning period, holding capacitors for holding the sampled data transmitted from the sampling capacitors upon termination of the horizontal scanning period and then outputting the sampled data to data signal lines, and a precharging circuit for precharging the corresponding holding capacitors by applying a predetermined voltage to the holding capacitors before the sampled data is transmitted to the holding capacitors.

Journal ArticleDOI
TL;DR: In this paper, the authors describe the implementation of an aliasing-free CW ultrasound Doppler system employing a single undersampling channel, in place of the two "quadrature" sampling channels already proposed by other authors.
Abstract: Recent introductions of low-cost high-performance devices have finally made feasible the implementation of "undersampling" techniques in different application areas. A significant example is represented by Doppler analysis, which typically involves the inspection of narrowband spectra around an RF carrier. This letter describes the implementation of an aliasing-free CW ultrasound Doppler system employing a "single" undersampling channel, in place of the two "quadrature" sampling channels already proposed by other authors. Implications in terms of clutter rejection are also discussed. >

Journal ArticleDOI
TL;DR: A VLSI implementation of a linear-phase digital filter for ECG signal processing has been designed, based on the use of recursive running-sum blocks, resulting in a very low computational complexity.
Abstract: A VLSI implementation of a linear-phase digital filter for ECG signal processing has been designed. With a sampling rate of 100 Hz, the passband is from 0.5 Hz to 49.5 Hz with 0.5-dB ripple. The filter architecture is based on the use of recursive running-sum blocks, resulting in a very low computational complexity. Module generators have been used in the layout design for high integration density. The circuit has been designed for a 2.0-/spl mu/m double-metal CMOS technology, having about 34000 transistors and a 15.43-mm/sup 2/ chip area. >

Patent
24 Aug 1994
TL;DR: In this article, a video signal to be processed is applied to a nonlinear processor having an adjustable gain responsive to a control signal over at least one portion of the amplitude range of the video input signal.
Abstract: A video signal to be processed is applied to a non-linear processor having an adjustable gain responsive to a control signal over at least one portion of the amplitude range of the video input signal. A sampling circuit, responsive to the video signal, generates video samples related to the video signal. A control circuit, responsive to the video samples, generates the control signal in accordance with the number of samples in at least a given amplitude range thereby controlling the percentage of samples of a given range in displayed images. Plural control and sampling circuits may be included provide control for white stretch processing, black stretch processing and video mid-point processing for enhancing contrast through out the entire video signal range.

Proceedings ArticleDOI
D.G. Nairn1
30 May 1994
TL;DR: An accurate high-speed switched-current sample-and-hold technique based on zero-voltage switching is presented, which significantly reduces the signal dependent charge injection, leading to improved sampling accuracy.
Abstract: Traditionally the accuracy of switched-current circuits has been much lower than that of switched-capacitor circuits. To address this problem, an accurate high-speed switched-current sample-and-hold technique based on zero-voltage switching is presented. The technique significantly reduces the signal dependent charge injection, leading to improved sampling accuracy. To demonstrate the proposed technique, a sample-and-hold has been implemented using a 1.2 /spl mu/m CMOS process. The circuit is expected to achieve 14 bit linearity at sampling rates exceeding 50 M Samples/sec. While dissipating only 3.5 mW from a nominal 3.3 V supply. >