Silicon-on-insulator (SOI) wafers are precisely engineered multilayer semiconductor/dielectric structures that provide new functionality for advanced Si devices. After more than three decades of materials research and device studies, SOI wafers have entered into the mainstream of semiconductor electronics. SOI technology offers significant advantages in design, fabrication, and performance of many semiconductor circuits. It also improves prospects for extending Si devices into the nanometer region (<10 nm channel length). In this article, we discuss methods of forming SOI wafers, their physical properties, and the latest improvements in controlling the structure parameters. We also describe devices that take advantage of SOI, and consider their electrical characteristics.

Frontiers of silicon-on-insulator

Strain plays a critical role in the properties of materials. In silicon and silicon-germanium, strain provides a mechanism for control of both carrier mobility and band offsets. In materials integration, strain is typically tuned through the use of dislocations and elemental composition. We demonstrate a versatile method to control strain by fabricating membranes in which the final strain state is controlled by elastic strain sharing, that is, without the formation of defects. We grow Si/SiGe layers on a substrate from which they can be released, forming nanomembranes. X-ray-diffraction measurements confirm a final strain predicted by elasticity theory. The effectiveness of elastic strain to alter electronic properties is demonstrated by low-temperature longitudinal Hall-effect measurements on a strained-silicon quantum well before and after release. Elastic strain sharing and film transfer offer an intriguing path towards complex, multiple-layer structures in which each layer's properties are controlled elastically, without the introduction of undesirable defects.

Elastically relaxed free-standing strained-silicon nanomembranes.

Wafer direct bonding refers to the process of adhesion of two flat mirror-polished wafers without using any intermediate gluing layers in ambient air or vacuum at room temperature. The adhesion of the two wafers occurs due to attractive long range van der Waals or hydrogen bonding forces. At room temperature the bonding energy of the interface is low and higher temperature annealing of the bonded wafer pairs has to be carried out to enhance the bonding energy. In this paper, we describe the prerequisites for the wafer-bonding process to occur and the methods to prepare the suitable surfaces for wafer bonding. The characterization techniques to assess the quality of the bonded interfaces and to measure the bonding energy are presented. Next, the applications of wafer direct bonding in the fabrication of novel engineered substrates such as "silicon-on-insulator" and other "on-insulator" substrates are detailed. These novel substrates, often called hybrid substrates, are fabricated using wafer bonding and layer splitting via a high dose hydrogen/helium implantation and subsequent annealing. The specifics of this process, also known as the smart-cut process, are introduced. Finally, the role of wafer bonding in future nanotechnology applications such as nanotransistor fabrication, three-dimensional integration for high-performance micro/nanoelectronics, nanotemplates based on twist bonding, and nano-electro-mechanical systems is discussed

Prolog to Wafer Direct Bonding: From Advance Substrate Engineering to Future Applications in Micro/Nanoelectronics

We present a high coupling coefficient, k eff 2 , micromechanical resonator based on the propagation of SH0 Lamb waves in thin, suspended plates of single crystal X-cut lithium niobate (LiNbO 3 ). The thin plates are fabricated using ion implantation of He to create a damaged layer of LiNbO 3 below the wafer surface. This damaged layer is selectively wet etched in a hydrofluoric (HF) acid based chemistry to form thin, suspended plates of LiNbO 3 without the wafer bonding, layer fracturing and chemical mechanical polishing in previously reported LiNbO 3 microfabrication approaches. The highest coupling coefficient is found for resonators with acoustic propagation rotated 170° from the y -axis, where a fundamental mode SH0 Lamb wave resonator with a plate width of 20 μm and a corresponding resonant frequency of 101 MHz achieves a k eff 2 of 12.4%, a quality factor of 1300 and a resonator figure of merit ( M ) of 185. The k eff 2 and M are among the highest reported for micromechanical resonators.

A high electromechanical coupling coefficient SH0 Lamb wave lithium niobate micromechanical resonator and a method for fabrication

The Smart-Cut® process, based on ion implantation (hydrogen, helium) and wafer bonding, appears more and more as a generic process. The first part of the paper is dedicated to the specific case of thermally-induced splitting. Cavity growth by the Ostwald ripening mechanism and crack propagation are responsible for thermally-induced splitting. In this case, the splitting kinetics are controlled by hydrogen diffusion. In the second part, the latest results concerning new structures are presented.

The generic nature of SmartCut process for thin film transfer

The SmartCut process was first developed to obtain silicon-on-insulator (SOI) materials. Now an industrial process, the main Unibond SOI-structure trends are reported in this paper. Many material combinations can be achieved by this process, because it appears to enable the generic development of new structures. Several of the new structures combining different materials and different bonding layers are described. These include SiGe and strained-Si films onto an oxidized Si wafer, silicon-on-insulating multilayer (SOIM) structures, and InP or 4H-SiC film transfers onto low-cost substrates via metallic or even refractory conductive-film bonding layers. More recently, an original bonding process based on mark patterning, wafer bonding, and layer transfer has been proposed to obtain structures in which the relative crystalline-axis orientations of both the film and the substrate can be controlled accurately. In this case, a SmartCut process that includes a mark-patterning step appears well suited for precise control of axis orientations. A procedure is described to obtain an ultra-thin Si film bonded onto a Si wafer. An example of a pure screw-dislocation network achieved by the mark patterning, bonding, and layer-transfer process is reported in this paper. The results have important implications for nanostructure development.

New layer transfers obtained by the SmartCut process

The Smart-Cut® process is based on proton implantation and wafer bonding. Proton implantation enables delamination of a thin layer from a thick substrate to be achieved whereas the wafer bonding technique enables different multilayer structures to be achieved by transferring the delaminated layer onto a second substrate. One of the best known applications of Smart Cut® is the Silicon On Insulator structure. The physical mechanisms involved in the delamination process are discussed based on the study of Proton-induced microcavity formation during implantation and growth during annealing. The experimental results on the time and temperature required to achieve delamination lead to different activation energies depending on the implantation conditions and resistivity of the substrate. All the experiments indicate that growth of microcavities is mainly controlled by hydrogen diffusion. The growth of these microcavities and the pressure inside them induce delamination when the catastrophic radius of the microcavities is reached.

Smart-Cut® Technology: an Industrial Application of Ion Implantation Induced Cavities

The Smart-Cut/sup R/ process is based on proton implantation and wafer bonding (Bruel, Electron. Lett. vol. 31, no. 14, pp. 1201-2, 1995). Proton implantation enables delamination of a thin layer from a thick substrate to be achieved, whereas the wafer bonding technique enables different multilayer structures to be achieved by transferring the delaminated layer to a second substrate. One of the best known current applications of Smart Cut/sup R/ is the silicon on insulator structure. The Smart-Cut process is suitable for different kinds of applications and the principle of this process can be applied to various materials (Si, SiC, GaAs, etc.) (Bruel, 1995; Di Cioccio et al. ibid, vol. 32, no. 12, pp. 1144-5, 1996; Jalaguier et al. ibid, vol. 34, no. 4, pp. 408-9, 1998). In this paper, the physical mechanisms involved in the delamination process are discussed based on the study of activation energies necessary to obtain splitting.

Kinetics of splitting in the Smart-Cut/sup R/ process

The Smart-Cut(R) process, based on proton implantation and wafer bonding, appears more and more as a generic process. The first part of the paper is dedicated to the specific case of thermally induced splitting. Cavity growth by Ostwald ripening mechanism and crack propagation are responsible for thermally-induced splitting. In this case, the splitting kinetics are controlled by hydrogen diffusion. In the second part, the latest results concerning new structures are presented.

C. Lagahe

Papers

The generic nature of SmartCut process for thin film transfer

New layer transfers obtained by the SmartCut process

Smart-Cut® Technology: an Industrial Application of Ion Implantation Induced Cavities

Kinetics of splitting in the Smart-Cut/sup R/ process

Smart-Cut(R) process: an original way to obtain thin films by ion implantation