In-band full-duplex (IBFD) operation has emerged as an attractive solution for increasing the throughput of wireless communication systems and networks. With IBFD, a wireless terminal is allowed to transmit and receive simultaneously in the same frequency band. This tutorial paper reviews the main concepts of IBFD wireless. One of the biggest practical impediments to IBFD operation is the presence of self-interference, i.e., the interference that the modem's transmitter causes to its own receiver. This tutorial surveys a wide range of IBFD self-interference mitigation techniques. Also discussed are numerous other research challenges and opportunities in the design and analysis of IBFD wireless systems.

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In-Band Full-Duplex Wireless: Challenges and Opportunities

In-band full-duplex (IBFD) operation has emerged as an attractive solution for increasing the throughput of wireless communication systems and networks. With IBFD, a wireless terminal is allowed to transmit and receive simultaneously in the same frequency band. This tutorial paper reviews the main concepts of IBFD wireless. Because one the biggest practical impediments to IBFD operation is the presence of self-interference, i.e., the interference caused by an IBFD node's own transmissions to its desired receptions, this tutorial surveys a wide range of IBFD self-interference mitigation techniques. Also discussed are numerous other research challenges and opportunities in the design and analysis of IBFD wireless systems.

Recent advances in self-interference cancellation techniques enable in-band full-duplex wireless systems, which transmit and receive simultaneously in the same frequency band with high spectrum efficiency. As a typical application of in-band full-duplex wireless, in-band full-duplex relaying (FDR) is a promising technology to integrate the merits of in-band full-duplex wireless and relaying technology. However, several significant research challenges remain to be addressed before its widespread deployment, including small-size full-duplex device design, channel modeling and estimation, cross-layer/joint resource management, interference management, security, etc. In this paper, we provide a brief survey on some of the works that have already been done for in-band FDR, and discuss the related research issues and challenges. We identify several important aspects of in-band FDR: basics, enabling technologies, information-theoretical performance analysis, key design issues and challenges. Finally, we also explore some broader perspectives for in-band FDR.

In-Band Full-Duplex Relaying: A Survey, Research Issues and Challenges

Before the emergence of ultra-wideband (UWB) radios, widely used wireless communications were based on sinusoidal carriers, and impulse technologies were employed only in specific applications (e.g. radar). In 2002, the Federal Communication Commission (FCC) allowed unlicensed operation between 3.1–10.6 GHz for UWB communication, using a wideband signal format with a low EIRP level (−41.3dBm/MHz). UWB communication systems then emerged as an alternative to narrowband systems and significant effort in this area has been invested at the regulatory, commercial, and research levels.

IEEE Transactions on Microwave Theory and Techniques and Antennas and Propagation Announce a Joint Special Issue on Ultra-Wideband (UWB) Technology

http://ieeexplore.ieee.org/iel5/5/31324/01456901.pdf

Microelectronic circuits

A K-band CMOS voltage-controlled oscillator (VCO) is implemented with a 0.18- ?m radio frequency CMOS process. For low supply voltage operation, a transformer-feedback topology using a transformer is proposed. The analysis of the transformer-feedback VCO is presented. This shows that the inductance ratio of the transformer must be optimized, and asymmetric-width transformers allow the easy optimization and the high Q-factor. Based on this analysis, the transformer design consideration of the transformer feedback VCO is presented. The VCO operates at 24.27 GHz with the phase noise of -100.33 dBc/Hz at 1-MHz offset, and it consumes 7.8 mW from a 0.65-V supply voltage.

Design of a 24-GHz CMOS VCO With an Asymmetric-Width Transformer

This letter presents a 28 GHz low insertion loss and compact size 4-bit phase shifter in 65 nm CMOS Technology. In order to get low insertion loss and compact size, this phase shifter is composed of two types of passive phase shifters, high-pass/low-pass type and switched filter type. Various techniques are used such as triple well body-floating, gate-floating, removal of capacitance of the off-state transistor using resonant inductor, and minimized interconnection line which is based on matching network. This phase shifter has 6.36 dB of average insertion loss over the 27.5–28.35 GHz, and loss variation is about 2 dB. The return loss is higher than 12 dB, RMS phase error is 8.98 $^{\circ}$ , OIP3 is 8.1 dBm at $-$ 10 dBm input power and its core size is 636 $\mu$ m $\times$ 360 $\mu$ m. To the authors' knowledge, these results are the state of the art in CMOS passive phase shifters in K-band frequency.

Low Insertion Loss, Compact 4-bit Phase Shifter in 65 nm CMOS for 5G Applications

This paper presents a 16-element phased-array receiver for 76-84-GHz applications with built-in self-test (BIST) capabilities. The chip contains an in-phase/quadrature (I/Q) mixer suitable for automotive frequency-modulation continuous-wave radar applications, which is also used as part of the BIST system. The chip achieves 4-bit RF amplitude and phase control, an RF to IF gain of 30-35 dB at 77-84 GHz, I/Q balance of and at 76-84 GHz, and a system noise figure of 18 dB. The on-chip BIST covers the 76-84-GHz range and determines, without any calibration, the amplitude and phase of each channel, a normalized frequency response, and can measure the gain control using RF gain control. System-level considerations are discussed together with extensive results showing the effectiveness of the on-chip BIST as compared with standard S-parameter measurements.

A 76–84-GHz 16-Element Phased-Array Receiver With a Chip-Level Built-In Self-Test System

A 16-element phased array receiver with built-in-self test (BIST) is demonstrated at 76–84 GHz. The BIST technique employs a miniature capacitive coupler located at the input port of each phased-array channel, and uses the receiver I/Q down-converter to measure the amplitude and phase of each channel. This allows for measuring the response of individual channels if one channel is turned on at a time, and an on-chip array factor if several channels are turned on and the phase between them is varied. BIST measurements done at 76–84 GHz agree very well with S-parameter measurements with a matched load and an open circuit load at each port, and show that this technique can be used to greatly lower the testing cost and improve the self-calibration of mm-wave phased-array RFICs.

A 76–84 GHz 16-element phased array receiver with a chip-level built-in-self-test system

This paper presents a 16-element Q-band transmit/ receive phased array with high receive linearity and low power consumption The design is based on the all-RF architecture with passive phase shifters and a 1:16 Wilkinson network An input P1dB from -9 to -10 dBm and a noise figure of 10-115 dB at 44-46 GHz is achieved in the receive mode with a power consumption of 095 W In the transmit mode, each channel has an output P1dB of 3-2 dBm and Psat of 6-4 dBm at 44-46 GHz with a power consumption of 116 W The design results in a low root mean square (rms) gain error due to a high-resolution variable gain amplifier in each channel Measurements on multiple channels show near-identical gain and phase response in both the transmit and receive mode due to the use of a symmetrical passive combiner The measured on-chip coupling is <; -40 dB and results in insignificant additional rms and phase error

Choul-Young Kim

Papers

Design of a 24-GHz CMOS VCO With an Asymmetric-Width Transformer

Low Insertion Loss, Compact 4-bit Phase Shifter in 65 nm CMOS for 5G Applications

A 76–84-GHz 16-Element Phased-Array Receiver With a Chip-Level Built-In Self-Test System

A 76–84 GHz 16-element phased array receiver with a chip-level built-in-self-test system

A 44–46-GHz 16-Element SiGe BiCMOS High-Linearity Transmit/Receive Phased Array