The present invention provides stretchable, and optionally printable, semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed. Stretchable semiconductors and electronic circuits of the present invention preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention may be adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.

http://science.sciencemag.org/content/sci/311/5758/208.full.pdf

Stretchable form of single crystal silicon for high performance electronics on rubber substrates

An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

Semiconductor device, and manufacturing method thereof

The present invention provides methods, systems and system components for transferring, assembling and integrating features and arrays of features having selected nanosized and/or microsized physical dimensions, shapes and spatial orientations. Methods of the present invention utilize principles of ‘soft adhesion’ to guide the transfer, assembly and/or integration of features, such as printable semiconductor elements or other components of electronic devices. Methods of the present invention are useful for transferring features from a donor substrate to the transfer surface of an elastomeric transfer device and, optionally, from the transfer surface of an elastomeric transfer device to the receiving surface of a receiving substrate. The present methods and systems provide highly efficient, registered transfer of features and arrays of features, such as printable semiconductor element, in a concerted manner that maintains the relative spatial orientations of transferred features.

Pattern Transfer Printing by Kinetic Control of Adhesion to an Elastomeric Stamp

The present invention provides device components geometries and fabrication strategies for enhancing the electronic performance of electronic devices based on thin films of randomly oriented or partially aligned semiconducting nanotubes. In certain aspects, devices and methods of the present invention incorporate a patterned layer of randomly oriented or partially aligned carbon nanotubes, such as one or more interconnected SWNT networks, providing a semiconductor channel exhibiting improved electronic properties relative to conventional nanotubes-based electronic systems.

Medium scale carbon nanotube thin film integrated circuits on flexible plastic substrates

Polymers for flexible displays: From material selection to device applications

Hydrogenated nanocrystalline silicon (nc-Si:H) films were deposited by using 13.56MHz plasma-enhanced chemical vapor deposition at 260°C by means of a silane (SiH4) plasma heavily diluted with hydrogen (H2). The high-quality nc-Si:H film showed an oxygen concentration (CO) of ∼1.5×1017at.∕cm3 and a dark conductivity (σd) of ∼10−6S∕cm, while the Raman crystalline volume fraction (Xc) was over 80%. Top-gate nc-Si:H thin-film transistors employing an optimized ∼100nm nc-Si:H channel layer exhibited a field-effect mobility (μFE) of ∼150cm2∕Vs, a threshold voltage (VT) of ∼2V, a subthreshold slope (S) of ∼0.25V∕dec, and an ON∕OFF current ratio of ∼106.

High-mobility nanocrystalline silicon thin-film transistors fabricated by plasma-enhanced chemical vapor deposition

This paper addresses the low-temperature deposition processes and electronic properties of silicon based thin film semiconductors and dielectrics to enable the fabrication of mechanically flexible electronic devices on plastic substrates. Device quality amorphous hydrogenated silicon (a-Si:H), nanocrystalline silicon (nc-Si), and amorphous silicon nitride (a-SiN/sub x/) films and thin film transistors (TFTs) were made using existing industrial plasma deposition equipment at the process temperatures as low as 75/spl deg/C and 120/spl deg/C. The a-Si:H TFTs fabricated at 120/spl deg/C demonstrate performance similar to their high-temperature counterparts, including the field effect mobility (/spl mu//sub FE/) of 0.8 cm/sup 2/V/sup -1/s/sup -1/, the threshold voltage (V/sub T/) of 4.5 V, and the subthreshold slope of 0.5 V/dec, and can be used in active matrix (AM) displays including organic light emitting diode (OLED) displays. The a-Si:H TFTs fabricated at 75/spl deg/C exhibit /spl mu//sub FE/ of 0.6 cm/sup 2/V/sup -1/s/sup -1/, and V/sub T/ of 4 V. It is shown that further improvement in TFT performance can be achieved by using n/sup +/ nc-Si contact layers and plasma treatments of the interface between the gate dielectric and the channel layer. The results demonstrate that with appropriate process optimization, the large area thin film Si technology suits well the fabrication of electronic devices on low-cost plastic substrates.

Low-Temperature Materials and Thin Film Transistors for Flexible Electronics

The authors report ultrahigh mobility nanocrystalline silicon thin-film transistors directly deposited by radio-frequency plasma enhanced chemical vapor deposition at 150°C. The transistors show maximum effective field effect mobilities of 450cm2∕Vs for electrons and 100cm2∕Vs for holes at room temperature. The authors argue that the key factor in their results is the reduction of the oxygen content, which acts as an accidental donor.

Directly deposited nanocrystalline silicon thin-film transistors with ultra high mobilities

We report the fabrication and characterization of bottom-gate and top-gate nanocrystalline silicon (nc-Si:H) thin-film transistors (TFTs) with amorphous-silicon nitride (a-SiNx:H) as the gate dielectric. The devices were fabricated using standard 13.56-MHz plasma-enhanced chemical vapor deposition at 240 degC. Here, the same 80-nm nc-Si:H channel, 300-nm a-SiNx:H gate dielectric, and 60-nm n+ nc-Si:H ohmic contact layers were used in both TFT structures. We analyzed the effects of gate configuration on TFT performance and, in particular, the electrical stability. The stability tests were carried out at a gate bias stress in the range from 20 to 40 V. The nc-Si:H TFTs demonstrated much better threshold-voltage (VT ) stability compared with the amorphous-silicon (a-Si:H) counterparts, offering great promise for applications in active-matrix organic light-emitting diode (AMOLED) displays

Stability of nc-Si:H TFTs With Silicon Nitride Gate Dielectric

Organic light emitting diode (OLED) displays are a serious competitor to liquid crystal displays in view of their superior picture quality, higher contrast, faster on/off response, thinner profile, and high power efficiency. For large area and/or high-resolution applications, an active matrix OLED (AMOLED) addressing scheme is vital. The active matrix backplane can be made with amorphous silicon (a-Si), polysilicon, or organic technology, all of which suffer from threshold voltage (VT) shift and/or mismatch problems, causing temporal or spatial variations in the OLED brightness. In addition, the efficiency of the OLED itself degrades over time. Despite these shortcomings, there has been considerable progress in development of AMOLED displays using circuit solutions engineered to provide stable and uniform brightness. Indeed the design of AMOLED pixel circuits, particularly in low-mobility TFT technologies such as a-Si, is challenging due to the stringent requirements of timing, current matching, and low voltage operation. While circuit solutions are necessary, they are not sufficient. Process improvements to enhance TFT performance are becoming inevitable. This paper will review pertinent material requirements of AMOLED backplanes along with design considerations that address pixel architecture, contact resistance, and more importantly, the VT-stability and associated gate overdrive voltage, VGS-VT. In particular, we address the question of whether conventional PECVD can be deployed for high mobility and high VT-stability TFTs, and if micro-/nano-crystalline silicon could provide the solution.

https://www.cambridge.org/core/services/aop-cambridge-core/content/view/S1946427400085195

Czang-Ho Lee

Papers

High-mobility nanocrystalline silicon thin-film transistors fabricated by plasma-enhanced chemical vapor deposition

Low-Temperature Materials and Thin Film Transistors for Flexible Electronics

Directly deposited nanocrystalline silicon thin-film transistors with ultra high mobilities

Stability of nc-Si:H TFTs With Silicon Nitride Gate Dielectric

Backplane Requirements for Active Matrix Organic Light Emitting Diode Displays