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Dae Hwan Kim

Researcher at Seoul National University

Publications -  31
Citations -  564

Dae Hwan Kim is an academic researcher from Seoul National University. The author has contributed to research in topics: Coulomb blockade & Transistor. The author has an hindex of 12, co-authored 31 publications receiving 548 citations. Previous affiliations of Dae Hwan Kim include Kookmin University.

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Modeling of amorphous InGaZnO thin-film transistors based on the density of states extracted from the optical response of capacitance-voltage characteristics

TL;DR: In this paper, the acceptor-like density of states (DOS) is extracted from the optical response of capacitance-voltage characteristics and confirmed by the TCAD simulation comparing with the measured data.
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Nanoscale Multi-Line Patterning Using Sidewall Structure

TL;DR: In this paper, a patterning technique to define nanoscale multiple lines is developed and optimized using sidewall structure, which can be applied to fabricate single electron devices, quantum devices, and other nano-scale devices.
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Pattern multiplication method and the uniformity of nanoscale multiple lines

TL;DR: In this article, a patterning technique to define ultrafine lines with high density and good uniformity using sidewall structures was developed, which can be applied to fabricate single electron devices, quantum devices, and other nanoscale devices.
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Extraction of Density of States in Amorphous GaInZnO Thin-Film Transistors by Combining an Optical Charge Pumping and Capacitance–Voltage Characteristics

TL;DR: In this article, the acceptor-like density of states (DOS) of n-channel amorphous GaInZnO (a-GIZO) thin-film transistors based on the combination of subbandgap optical charge pumping and C-V characteristics is proposed.
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Silicon single-electron transistors with sidewall depletion gates and their application to dynamic single-electron transistor logic

TL;DR: In this article, a single-electron transistors (SETs) with side-wall depletion gates on a silicon-on-insulator nanometer-scale wire are proposed and fabricated, using the combination of the conventional lithography and process technology.