David Esseni

TL;DR: In this paper, a comparison of FinFET, stacked nanowires (stacked NWs), circular and square gate-all-around (GAA) n-FETs with same footprint was performed by using an in-house deterministic BTE solver accounting for quantum confinement, a wide set of scattering mechanisms and self-heating.

TL;DR: In this article, the authors developed a detailed physical model to interpret the dependence of the stress induced leakage current (SILC) distributions on the nature and position of the generated defects, and exploited it to reconsider previously published experimental data on the statistical distribution of the SILC in Flash arrays.

TL;DR: In this paper, the authors examined the phenomenon of SEEI using floating gate devices less aggressively scaled than the MOSFETs of Bude and developed criteria to separate SEEI from the coexisting channel hot electron (CHE) injection.

TL;DR: In this article, the back-gate voltage dependence of metal-graphene contact resistance was studied through extensive experimental characterization, Monte-Carlo transport simulations and density functional theory (DFT) analysis.

TL;DR: In this article, the authors review important theoretical and experimental aspects of both electrostatics and channel mobility in High-K Metal Gate UTBB-FDSOI MOSFETs.