THE DESIGN AND ANALYSIS OF EXPERIMENTS. By Oscar Kempthorne. New York, John Wiley and Sons, Inc., 1952. 631 pp. $8.50. This book by a teacher of statistics (as well as a consultant for \"experimenters\") is a comprehensive study of the philosophical background for the statistical design of experiment. It is necessary to have some facility with algebraic notation and manipulation to be able to use the volume intelligently. The problems are presented from the theoretical point of view, without such practical examples as would be helpful for those not acquainted with mathematics. The mathematical justification for the techniques is given. As a somewhat advanced treatment of the design and analysis of experiments, this volume will be interesting and helpful for many who approach statistics theoretically as well as practically. With emphasis on the \"why,\" and with description given broadly, the author relates the subject matter to the general theory of statistics and to the general problem of experimental inference. MARGARET J. ROBERTSON

The Design and Analysis of Experiments

Neuromorphic computing has come to refer to a variety of brain-inspired computers, devices, and models that contrast the pervasive von Neumann computer architecture This biologically inspired approach has created highly connected synthetic neurons and synapses that can be used to model neuroscience theories as well as solve challenging machine learning problems The promise of the technology is to create a brain-like ability to learn and adapt, but the technical challenges are significant, starting with an accurate neuroscience model of how the brain works, to finding materials and engineering breakthroughs to build devices to support these models, to creating a programming framework so the systems can learn, to creating applications with brain-like capabilities In this work, we provide a comprehensive survey of the research and motivations for neuromorphic computing over its history We begin with a 35-year review of the motivations and drivers of neuromorphic computing, then look at the major research areas of the field, which we define as neuro-inspired models, algorithms and learning approaches, hardware and devices, supporting systems, and finally applications We conclude with a broad discussion on the major research topics that need to be addressed in the coming years to see the promise of neuromorphic computing fulfilled The goals of this work are to provide an exhaustive review of the research conducted in neuromorphic computing since the inception of the term, and to motivate further work by illuminating gaps in the field where new research is needed

A Survey of Neuromorphic Computing and Neural Networks in Hardware.

Fabrication of monolithic lattice-mismatched semiconductor heterostructures with limited area regions having upper portions substantially exhausted of threading dislocations, as well as fabrication of semiconductor devices based on such lattice-mismatched heterostructures.

Lattice-Mismatched Semiconductor Structures with Reduced Dislocation Defect Densities and Related Methods for Device Fabrication

Asynchronous Circuit Design

Defect-free germanium has been demonstrated in SiO2 trenches on silicon via Aspect Ratio Trapping, whereby defects arising from lattice mismatch are trapped by laterally confining sidewalls. Results were achieved through a combination of conventional photolithography, reactive ion etching of SiO2, and selective growth of Ge as thin as 450nm. Full trapping of dislocations originating at the Ge∕Si interface has been demonstrated for trenches up to 400nm wide without the additional formation of defects at the sidewalls. This approach shows great promise for the integration of Ge and/or III-V materials, sufficiently large for key device applications, onto silicon substrates.

Defect reduction of selective Ge epitaxy in trenches on Si(001) substrates using aspect ratio trapping

The San Jose State University Electrical Engineering (EE) Department implemented a skill audit exam for graduating seniors in 1999 with the purpose of assessing the teaching and the students' mastery of core concepts in EE. However, consistent low scores for the first years in which the test was administered suggested that students had little incentive in reviewing for passing the test. To promote the concept that there is a set of basic skills every graduating senior should master, improvements were implemented that included creating an online exam used for review and requiring students to earn a 70% or higher score on an in-class exam that is a requirement for graduation. After the improvements were made, all students demonstrated at least 70% mastery of the core EE concepts as measured by the improved in-class skill audit exam. The details of these improvements are presented. Anonymous survey results of graduating seniors indicate that students feel that preparing for the skill audit exam was a good use of their time and that the exam should be made more rigorous for future students.

Improvements to an Electrical Engineering Skill Audit Exam to Improve Student Mastery of Core EE Concepts

ZnSySe1−yZnSe/GaAs (001) heterostructures have been grown by photoassisted metalorganic vapor phase epitaxy, using the sources dimethylzinc, dimethylselenium, diethylsulfur, and irradiation by a Hg arc lamp. The solid phase composition vs gas phase composition characteristics have been determined for ZnSyySe1−y grown with different mole fractions of dimethylselenium and different temperatures. Although the growth is not mass-transport controlled with respect to the column VI precursors, the solid phase composition vs gas phase composition characteristics are sufficiently gradual so that good compositional control and lattice matching to GaAs substrates can be readily achieved by photoassisted growth in the temperature range 360°C ≤ T ≤ 400°C. ZnSe/GaAs (001) single heterostructures were grown by a two-step process with ZnSe thicknesses in the range from 54 nm to 776 nm. Based on 004 x-ray rocking curve full width at half maximums (FWHMs), we have determined that the critical layer thickness is hc ≤200 nm. Using the classical method involving strain, lattice relaxation is undetectable in layers thinner than 270 nm for the growth conditions used here. Therefore, the rocking curve FWHM is a more sensitive indicator of lattice relaxation than the residual strain. For ZnSySe1−y layers grown on ZnSe buffers at 400°C, the measured dislocation density-thickness product Dh increases monotonically with the room temperature mismatch. Lower values of the Dh product are obtained for epitaxy on 135 nm buffers compared to the case of 270 nm buffers. This difference is due to the fact that the 135 nm ZnSe buffers are pseudomorphic as deposited. For ZnSySe1−y layers grown on 135 nm ZnSe buffers at 360°C, the minimum dislocation density corresponds approximately to room-temperature lattice matching (y ∼ 5.9%), rather than growth temperature lattice matching (y ∼ 7.6%). Epitaxial layers with lower dislocation densities demonstrated superior optical quality, as judged by the near-band edge/deep level emission peak intensity ratio and the near band edge absolute peak intensity from 300K photoluminescence measurements.

Structural properties of ZnS y Se 1−y /ZnSe/GaAs (001) heterostructures grown by photoassisted metalorganic vapor phase epitaxy

As societal challenges involving sustainable development increase, the need to effectively inte grate this inherently multidisciplinary topic into existing curricula becomes more pressing. Multi disciplinary, team-taught, project-based instruction has shown effectiveness in teaching teamwork, communication, and life-long learning skills, and appreciation for other disciplines. Unfortunately, this instruction mode has not been widely adopted, largely due to its resource-intensiveness. Our proposed co-instruction model of multidisciplinary senior project administration was tested to see if it could effectively teach sustainability topics and duplicate the known benefits of team-taught instruction, while overcoming its resource-intensiveness. A case study of a co-instructed senior project was undertaken with students and faculty from electrical and mechanical engineering, business, political science, and industrial design. The participating students were compared to the control group, i.e. students who chose to complete a traditional disciplinary senior project instead. Extensive assessment was performed with pre/post quizzes, online surveys, focus groups, and course deliverables. The multidisciplinary projects outperformed traditional senior projects in 4 out of the 5

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A Case Study of a Co-Instructed Multidisciplinary Senior Capstone Project in Sustainability.

A Design-Technology Co-Optimization (DTCO) framework is constructed to study the algorithm-circuit-device interaction for optimizing emerging memory-based neuromorphic computing circuits. The framework consists of 3 parts, namely, software level machine learning to perform machine learning calculation as a benchmark or for off-line training purpose, generation of emerging memory Verilog-A model based on experimental or physical simulation data, and automatic SPICE neuromorphic circuit simulations and simulation result analysis. A python-based wrapper is constructed to link the 3 parts to automate the task and improve usability and flexibility. In this paper, the effect of current comparator input impedance, operation temperature, and input voltage range on the accuracy of ReRAM based neuromorphic inference circuit (a neural network) for digit image recognition is studied. The training is done off-line using software machine learning. The neural network with an input layer of 64 neurons, the hidden layer (1, 3 or 5 layers) with 8 neurons and an output layer of 10 neurons was trained using ~1800 hand-written digit images. ReRAM neuromorphic circuit for inference is constructed automatically with the training weights being transformed into gap sizes in ReRAM for circuit simulations. 180 unseen digit images are used to test the robustness of its inference accuracy. It is found that a deeper neural network has worse robustness in inference accuracy while non-zero current comparator input impedance makes the neuromorphic circuit more robust.

David W Parent

Papers

Improvements to an Electrical Engineering Skill Audit Exam to Improve Student Mastery of Core EE Concepts

Structural properties of ZnS y Se 1−y /ZnSe/GaAs (001) heterostructures grown by photoassisted metalorganic vapor phase epitaxy

A Case Study of a Co-Instructed Multidisciplinary Senior Capstone Project in Sustainability.

Study of ReRAM Neuromorphic Circuit Inference Accuracy Robustness using DTCO Simulation Framework

Structural properties of ZnSySe1 − y/ZnSe/GaAs(0 0 1) heterostructures grown by photoassisted metalorganic vapor phase epitaxy