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David W Parent
Researcher at San Jose State University
Publications - 55
Citations - 333
David W Parent is an academic researcher from San Jose State University. The author has contributed to research in topics: Transistor & Metalorganic vapour phase epitaxy. The author has an hindex of 8, co-authored 53 publications receiving 299 citations. Previous affiliations of David W Parent include University of California, Santa Cruz & University of Connecticut.
Papers
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Journal Article
Influence of Personality on a Senior Project Combining Innovation and Entrepreneurship
TL;DR: In this article, the influence of personality domains described by the Big-Five (extraversion, agreeableness, conscientiousness, emotional stability, and openness) on individual student performance, groupexperience, and attitudes towards multidisciplinarity, after the conclusion of the first semester of a two semester experience, are explored.
Journal ArticleDOI
Microelectronics Process Engineering: A Non-Traditional Approach to MS&E
Emily L. Allen,Stacy H. Gleixner,Gregory Young,David W Parent,Yasser Dessouky,Linda Vanasupa +5 more
TL;DR: The Microelectronics Process Engineering (μProE) program as mentioned in this paper is an interdisciplinary program with a particular emphasis on microelectronics-related manufacturing, drawing from materials, chemical, electrical and industrial engineering programs and tied together with courses, internships and projects which integrate thin film processing with manufacturing control methods.
Proceedings ArticleDOI
Evaluation of a Double Implanted Diffused MOSFET for Analog Operation
Eric J. Basham,David W Parent +1 more
TL;DR: In this article, a laterally diffused implanted MOS transistor was fabricated in a standard 1.5 mum CMOS process by shifting the alignment between the p-well and the gate, resulting in an asymmetric channel doping and a lowly doped drift region.
Course Assessment of the Microelectronics Process Engineering Program at SJSU
Gregory Young,Stacy H. Gleixner,David W Parent,Yasser Dessouky,Emily L. Allen,Linda Vanasupa +5 more
TL;DR: The program assessment strategy of San Jose State University's new interdisciplinary curriculum in Microelectronics Process Engineering is described in this article, which relies on clearly defined and detailed program and course learning objectives that are linked vertically to ABET outcomes.
Journal ArticleDOI
Design Optimization of Transistors Used for Neural Recording
Eric J. Basham,David W Parent +1 more
TL;DR: An alternative strategy based on the design approach to optimize a single-stage common-source amplifier design is presented and insight into approaches to improving the transistor process design for application as a neuron-FET transducer is provided.