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Showing papers by "Gyu Tae Kim published in 2016"


Journal ArticleDOI
TL;DR: In this paper, a thin ceramic bi-layered membrane comprising yttria-stabilized zirconia (YSZ) and gadolinia-doped ceria (GDC) is fabricated by the cost-effective slurry spin coating technique, and it is evaluated as an electrolyte of solid oxide fuel cells (SOFCs).

52 citations


Journal ArticleDOI
TL;DR: The observed low frequency noise properties can be useful as guidance for quality and reliability of GaAsSb NW based electronic devices, especially for photodetectors.
Abstract: Due to bandgap tunability, GaAsSb nanowires (NWs) have received a great deal of attention for a variety of optoelectronic device applications. However, electrical and optical properties of GaAsSb are strongly affected by Sb-related defects and scattering from surface states and/or defects, which can limit the performance of GaAsSb NW devices. Thus, in order to utilize the GaAsSb NWs for high performance electronic and optoelectronic devices, it is required to study the material and interface properties (e.g. the interface trap density) in the GaAsSb NW devices. Here, we investigate the low frequency noise in single GaAsSb NWs with self-induced compositional gradients. The current noise spectral density of the GaAsSb NW device showed a typical 1/f noise behavior. The Hooge's noise parameter and the interface trap density of the GaAsSb NW device were found to be ∼2.2 × 10(-2) and ∼2 × 10(12) eV(-1) cm(-2), respectively. By applying low frequency noise measurements, the noise equivalent power, a key figure of merit of photodetectors, was calculated. The observed low frequency noise properties can be useful as guidance for quality and reliability of GaAsSb NW based electronic devices, especially for photodetectors.

20 citations


Journal ArticleDOI
TL;DR: The present nanojunction devices exhibit a lower Schottky barrier height and a higher ideality factor than those of the bulk materials, which is consistent with the findings of previous works on nanostructures.
Abstract: To develop the advanced electronic devices, the surface/interface of each component must be carefully considered. Here, we investigate the electrical properties of metal-semiconductor nanoscale junction using conductive atomic force microscopy (C-AFM). Single-crystalline CdS, CdSe, and ZnO one-dimensional nanostructures are synthesized via chemical vapor transport, and individual nanobelts (or nanowires) are used to fabricate nanojunction electrodes. The current-voltage (I -V) curves are obtained by placing a C-AFM metal (PtIr) tip as a movable contact on the nanobelt (or nanowire), and often exhibit a resistive switching behavior that is rationalized by the Schottky (high resistance state) and ohmic (low resistance state) contacts between the metal and semiconductor. We obtain the Schottky barrier height and the ideality factor through fitting analysis of the I-V curves. The present nanojunction devices exhibit a lower Schottky barrier height and a higher ideality factor than those of the bulk materials, which is consistent with the findings of previous works on nanostructures. It is shown that C-AFM is a powerful tool for characterization of the Schottky contact of conducting channels between semiconductor nanostructures and metal electrodes.

16 citations


Journal ArticleDOI
TL;DR: In this paper, the authors demonstrate that an ambipolar behavior in MoS2 field effect transistors (FETs) can be easily obtained by heating MoS 2 flakes under air atmosphere in the presence of cobalt oxide catalyst.
Abstract: Modulation of electrical properties in MoS2 flakes is an attractive issue from the point of view of device applications. In this work, we demonstrate that an ambipolar behavior in MoS2 field effect transistors (FETs) can be easily obtained by heating MoS2 flakes under air atmosphere in the presence of cobalt oxide catalyst (MoS2 + O2 → MoOx + SOx). The catalytic oxidation of MoS2 flakes between source-drain electrodes resulted in lots of MoOx nanoparticles (NPs) on MoS2 flakes with thickness reduction from 64 nm to 17 nm. Consequently, N-type behavior of MoS2 FETs was converted into ambipolar transport characteristics by MoOx NPs which inject hole carriers to MoS2 flakes.

7 citations


Journal ArticleDOI
TL;DR: Graphene field effect transistors fabricated on a trench structure made by carbonized poly(methylmethacrylate) to modify the graphene surface showed different characteristics depending on the channel orientation and the pitch size of the trenches as well as channel area in the FETs.
Abstract: In this work, graphene field effect transistors (FETs) were fabricated on a trench structure made by carbonized poly(methylmethacrylate) to modify the graphene surface. The trench-structured devices showed different characteristics depending on the channel orientation and the pitch size of the trenches as well as channel area in the FETs. Periodic corrugations and barriers of suspended graphene on the trench structure were measured by atomic force microscopy and electrostatic force microscopy. Regular barriers of 160 mV were observed for the trench structure with graphene. To confirm the transfer mechanism in the FETs depending on the channel orientation, the ratio of experimental mobility (3.6–3.74) was extracted from the current–voltage characteristics using equivalent circuit simulation. It is shown that the number of barriers increases as the pitch size decreases because the number of corrugations increases from different trench pitches. The noise for the 140 nm pitch trench is 1 order of magnitude hi...

5 citations


Journal ArticleDOI
TL;DR: In this article, the effect of high channel doping concentration and unique structure of junctionless transistors (JLTs) is investigated in the sub-threshold conduction regime, and both experimental results and simulation work show that JLTs have reduced portion of the diffusion conduction and lower effective barrier height between source/drain and the silicon channel in subthreshold regime, compared to conventional inversionmode (IM) transistors.
Abstract: In this work, the effect of high channel doping concentration and unique structure of junctionless transistors (JLTs) is investigated in the subthreshold conduction regime. Both experimental results and simulation work show that JLTs have reduced portion of the diffusion conduction and lower effective barrier height between source/drain and the silicon channel in subthreshold regime, compared to conventional inversion-mode (IM) transistors. Finally, it leads to a relatively large DIBL value in JLTs, owing to degraded gate controllability on channel region and strong drain bias effect. However, JLTs showed a better immunity against short channel effect in terms of degradation of the effective barrier height value.

5 citations