S
Sylvain Barraud
Researcher at University of Grenoble
Publications - 265
Citations - 4813
Sylvain Barraud is an academic researcher from University of Grenoble. The author has contributed to research in topics: Nanowire & Transistor. The author has an hindex of 31, co-authored 243 publications receiving 3881 citations. Previous affiliations of Sylvain Barraud include Commissariat à l'énergie atomique et aux énergies alternatives & French Alternative Energies and Atomic Energy Commission.
Papers
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Journal ArticleDOI
A CMOS silicon spin qubit.
Romain Maurand,Xavier Jehl,Dharmraj Kotekar-Patil,Andrea Corna,H. Bohuslavskyi,R. Lavieville,Louis Hutin,Sylvain Barraud,Maud Vinet,Marc Sanquer,S. De Franceschi +10 more
TL;DR: The demonstrated qubit functionality in a basic transistor-like device constitutes a promising step towards the elaboration of scalable spin qubit geometries in a readily exploitable CMOS platform.
Journal ArticleDOI
Scaling of Trigate Junctionless Nanowire MOSFET With Gate Length Down to 13 nm
Sylvain Barraud,Matthieu Berthomé,R. Coquand,Mikael Casse,Thomas Ernst,Marie-Pierre Samson,P. Perreau,Konstantin Bourdelle,Olivier Faynot,Thierry Poiroux +9 more
TL;DR: In this article, the performance of high-κ /metal gate nanowire (NW) transistors without junctions is reported, with a channel thickness of 9 nm and sub-15-nm gate length and width.
Journal ArticleDOI
Probing the limits of gate-based charge sensing.
TL;DR: The ultimate performance of such a resonant gate-based readout scheme is investigated and a charge sensitivity of 37 μe Hz(-1/2), the best value reported, is found.
Proceedings ArticleDOI
Planar Fully depleted SOI technology: A powerful architecture for the 20nm node and beyond
O. Faynot,Francois Andrieu,Olivier Weber,Claire Fenouillet-Beranger,Pierre Perreau,J. Mazurier,T. Benoist,O. Rozeau,Thierry Poiroux,Maud Vinet,Laurent Grenouillet,J.-P. Noel,Nicolas Posseme,Sébastien Barnola,François Martin,C. Lapeyre,Mikael Casse,X. Garros,M-A. Jaud,Olivier P. Thomas,G. Cibrario,L. Tosti,L. Brevard,Claude Tabone,P. Gaud,Sylvain Barraud,Thomas Ernst,Simon Deleonibus +27 more
TL;DR: In this article, the main advantages of planar undoped channel Fully depleted SOI devices are discussed and solutions to the Multiple V T challenges and non logic devices (ESD, I/Os) are reported.
Journal ArticleDOI
Performance of Omega-Shaped-Gate Silicon Nanowire MOSFET With Diameter Down to 8 nm
Sylvain Barraud,R. Coquand,Mikael Casse,M. Koyama,Jean-Michel Hartmann,V. Maffini-Alvaro,C. Comboroure,C. Vizioz,F. Aussenac,Olivier Faynot,Thierry Poiroux +10 more
TL;DR: In this paper, the electrostatic and performance of cylindrical silicon nanowire (NW) MOSFETs with an omega-shaped gate and diameters down to 8 nm are investigated.