Huan-Neng Ron Chen

TL;DR: An integrated on-chip matching network serves to both PA and low-noise transconductance amplifier, thus allowing a 1-pin direct antenna connection with no external band-selection filters.

TL;DR: A new transmitter architecture for ultra-low power radios in which the most energy-hungry RF circuits operate at a supply just above a threshold voltage of CMOS transistors, and an all-digital PLL employs a digitally controlled oscillator with switching current sources to reduce supply voltage and power without sacrificing its startup margin.

TL;DR: A time-predictive architecture of an all-digital PLL (ADPLL) for cellular radios, which is optimized for advanced CMOS, based on a 1/8-length time-to-digital converter of stabilized 7-ps resolution, as well as wide tuning range, and fine-resolution class-F digitally controlled oscillator (DCO) with only switchable metal capacitors.

TL;DR: A digitally controlled frequency generator for dual frequency-band radar system that is optimized for 16 nm FinFET CMOS, based on a 21% wide tuning range, fine-resolution DCO with only switchable metal capacitors.

TL;DR: A sub-gigahertz transmitter with a physically merged digitally controlled oscillator (DCO) and digital power amplifier (DPA) and matching transformer of single-ended DPA is placed inside the DCO transformer to save ~50% of area.