http://www.acsu.buffalo.edu/~jmjornet/papers/2014/j1.pdf

Full length article: Terahertz band: Next frontier for wireless communications

This tutorial presents an overview of the technological advances in millimeter-wave (mm-wave) circuit components, antennas, and propagation that will soon allow 60-GHz transceivers to provide multigigabit per second (multi-Gb/s) wireless communication data transfers in the consumer marketplace. Our goal is to help engineers understand the convergence of communications, circuits, and antennas, as the emerging world of subterahertz and terahertz wireless communications will require understanding at the intersections of these areas. This paper covers trends and recent accomplishments in a wide range of circuits and systems topics that must be understood to create massively broadband wireless communication systems of the future. In this paper, we present some evolving applications of massively broadband wireless communications, and use tables and graphs to show research progress from the literature on various radio system components, including on-chip and in-package antennas, radio-frequency (RF) power amplifiers (PAs), low-noise amplifiers (LNAs), voltage-controlled oscillators (VCOs), mixers, and analog-to-digital converters (ADCs). We focus primarily on silicon-based technologies, as these provide the best means of implementing very low-cost, highly integrated 60-GHz mm-wave circuits. In addition, the paper illuminates characterization techniques that are required to competently design and fabricate mm-wave devices in silicon, and illustrates effects of the 60-GHz RF propagation channel for both in-building and outdoor use. The paper concludes with an overview of the standardization and commercialization efforts for 60-GHz multi-Gb/s devices, and presents a novel way to compare the data rate versus power efficiency for future broadband devices.

http://faculty.poly.edu/~tsr/wp-content/uploads/publications/abstract17.pdf

State of the Art in 60-GHz Integrated Circuits and Systems for Wireless Communications

A 0.13-mum SiGe BiCMOS double-conversion superheterodyne receiver and transmitter chipset for data communications in the 60-GHz band is presented. The receiver chip includes an image-reject low-noise amplifier (LNA), RF-to-IF mixer, IF amplifier strip, quadrature IF-to-baseband mixers, phase-locked loop (PLL), and frequency tripler. It achieves a 6-dB noise figure, -30 dBm IIP3, and consumes 500 mW. The transmitter chip includes a power amplifier, image-reject driver, IF-to-RF upmixer, IF amplifier strip, quadrature baseband-to-IF mixers, PLL, and frequency tripler. It achieves output P1dB of 10 to 12dBm, Psat of 15 to 17 dBm, and consumes 800 mW. The chips have been packaged with planar antennas, and a wireless data link at 630 Mb/s over 10 m has been demonstrated

A Silicon 60-GHz Receiver and Transmitter Chipset for Broadband Communications

A low-noise amplifier, direct-conversion quadrature mixer, power amplifier, and voltage-controlled oscillators have been implemented in a 012-/spl mu/m, 200-GHz f/sub T/290-GHz f/sub MAX/ SiGe bipolar technology for operation at 60 GHz At 615 GHz, the two-stage LNA achieves 45-dB NF, 15-dB gain, consuming 6 mA from 18 V This is the first known demonstration of a silicon LNA at V-band The downconverter consists of a preamplifier, I/Q double-balanced mixers, a frequency tripler, and a quadrature generator, and is again the first known demonstration of silicon active mixers at V-band At 60 GHz, the downconverter gain is 186 dB and the NF is 133 dB, and the circuit consumes 55 mA from 27 V, while the output buffers consume an additional 52 mA The balanced class-AB PA provides 108-dB gain, +112-dBm 1-dB compression point, 43% maximum PAE, and 16-dBm saturated output power Finally, fully differential Colpitts VCOs have been implemented at 22 and 67 GHz The 67-GHz VCO has a phase noise better than -98 dBc/Hz at 1-MHz offset, and provides a 31% tuning range for 8-mA current consumption from a 3-V supply

SiGe bipolar transceiver circuits operating at 60 GHz

An integrated SiGe superheterodyne RX/TX pair capable of Gb/s data rates in the 60GHz band is described. The 6dB NF RX includes an image-reject LNA, a multistage down-converter with on-chip IF filters, a frequency tripler, a PLL, and baseband outputs. The 10 to 12dBm P1dBTX achieves 10% PAE in the final stage. It includes a PA, image-reject driver, multistage up-converter with on-chip filters, tripler, and PLL

A silicon 60GHz receiver and transmitter chipset for broadband communications

A 0.13 μm SiGe BiCMOS technology for millimeter-wave applications is presented. This technology features high-speed HBTs with peak transit frequencies fT of 240 GHz, maximum oscillation frequencies fmax of 330 GHz, and breakdown voltages BVCEO of 1.7 V along with high-voltage HBTs (fT = 50 GHz,fmax = 130 GHz, BVCEO = 3.7 V) integrated in a dual gate oxide RF-CMOS process. Ring oscillator gate delays of 2.9 ps, low-noise amplifiers for 122 GHz, and LC oscillators with fundamental-mode oscillation frequencies above 200 GHz are demonstrated.

A 0.13 $\mu{\hbox {m}}$ SiGe BiCMOS Technology Featuring f $_{T} $ /f $_{\max}$ of 240/330 GHz and Gate Delays Below 3 ps

A 0.13 µm SiGe BiCMOS technology for millimeter wave applications is presented. This technology features high-speed HBTs (f T =240 GHz, f max =330 GHz, BV CEO =1.7 V) along with high-voltage HBTs (f T =50 GHz, f max =130 GHz, BV CEO =3.7 V) integrated in a dual-gate, triple-well RF-CMOS process. Ring oscillator gate delays of 2.9 ps, low-noise amplifiers for 122 GHz, and LC oscillators for frequencies above 200 GHz are demonstrated.

A 0.13µm SiGe BiCMOS technology featuring f T /f max of 240/330 GHz and gate delays below 3 ps

An integrated PLL aimed at wireless transceivers in the unlicensed band from 59GHz to 64GHz is described. The PLL was fabricated in a SiGe:C BiCMOS technology with both f/sub T//f/sub max/=200GHz. The measured PLL lock range is from 53.3GHz to 55.7GHz. It operates from a 3V supply except for a first divide-by-two stage which requires a 5V supply. Total power consumption is 895mW.

A fully integrated BiCMOS PLL for 60 GHz wireless applications

This paper presents an on-chip double-dipole antenna by applying micromachining techniques based on a standard SiGe BiCMOS process. It enables the fully integration of millimeter-wave transceiver and antenna into a single chip. A parametric study has been made in simulation which reveals the influence of the key design parameters over the radiation efficiency and directivity. A prototype has been fabricated and measured to verify the design. The measured peak gain is 8.4 dBi at 130 GHz with a simulated efficiency of 60 %. The 3-dB gain bandwidth is 122 – 140 GHz.

A micromachined double-dipole antenna for 122 – 140 GHz applications based on a SiGe BiCMOS technology

This paper presents a SiGe differential low-noise amplifier (LNA) for the V-band. The measured gain at 60 GHz is 18 dB, and the input return loss is below -15 dB. The 3-dB bandwidth is from 49 GHz to 71 GHz. Measured and simulated S-parameters agree well over the whole range. The LNA draws 30 mA from a 2.2 V supply. It facilitates the design of a fully integrated WLAN receiver in the 57-64 GHz band.

J. Borngraber

Papers

A 0.13 $\mu{\hbox {m}}$ SiGe BiCMOS Technology Featuring f $_{T} $ /f $_{\max}$ of 240/330 GHz and Gate Delays Below 3 ps

A 0.13µm SiGe BiCMOS technology featuring f T /f max of 240/330 GHz and gate delays below 3 ps

A fully integrated BiCMOS PLL for 60 GHz wireless applications

A micromachined double-dipole antenna for 122 – 140 GHz applications based on a SiGe BiCMOS technology

A fully integrated 60 GHz LNA in SiGe:C BiCMOS technology