THE DESIGN AND ANALYSIS OF EXPERIMENTS. By Oscar Kempthorne. New York, John Wiley and Sons, Inc., 1952. 631 pp. $8.50. This book by a teacher of statistics (as well as a consultant for \"experimenters\") is a comprehensive study of the philosophical background for the statistical design of experiment. It is necessary to have some facility with algebraic notation and manipulation to be able to use the volume intelligently. The problems are presented from the theoretical point of view, without such practical examples as would be helpful for those not acquainted with mathematics. The mathematical justification for the techniques is given. As a somewhat advanced treatment of the design and analysis of experiments, this volume will be interesting and helpful for many who approach statistics theoretically as well as practically. With emphasis on the \"why,\" and with description given broadly, the author relates the subject matter to the general theory of statistics and to the general problem of experimental inference. MARGARET J. ROBERTSON

The Design and Analysis of Experiments

Handbook of Approximation: Algorithms and Metaheuristics

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Logical Effort Designing Fast Cmos Circuits

The disadvantages of particle swarm optimization (PSO) algorithm are that it is easy to fall into local optimum in high-dimensional space and has a low convergence rate in the iterative process. To deal with these problems, an adaptive particle swarm optimization algorithm based on directed weighted complex network (DWCNPSO) is proposed. Particles can be scattered uniformly over the search space by using the topology of small-world network to initialize the particles position. At the same time, an evolutionary mechanism of the directed dynamic network is employed to make the particles evolve into the scale-free network when the in-degree obeys power-law distribution. In the proposed method, not only the diversity of the algorithm was improved, but also particles’ falling into local optimum was avoided. The simulation results indicate that the proposed algorithm can effectively avoid the premature convergence problem. Compared with other algorithms, the convergence rate is faster.

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An Adaptive Particle Swarm Optimization Algorithm Based on Directed Weighted Complex Network

Recently, much progress has been made on particle swarm optimization (PSO). A number of works have been devoted to analyzing the convergence of the underlying algorithms. Nevertheless, in most cases, rather simplified hypotheses are used. For example, it often assumes that the swarm has only one particle. In addition, more often than not, the variables and the points of attraction are assumed to remain constant throughout the optimization process. In reality, such assumptions are often violated. Moreover, there are no rigorous rates of convergence results available to date for the particle swarm, to the best of our knowledge. In this paper, we consider a general form of PSO algorithms, and analyze asymptotic properties of the algorithms using stochastic approximation methods. We introduce four coefficients and rewrite the PSO procedure as a stochastic approximation type iterative algorithm. Then we analyze its convergence using weak convergence method. It is proved that a suitably scaled sequence of swarms converge to the solution of an ordinary differential equation. We also establish certain stability results. Moreover, convergence rates are ascertained by using weak convergence method. A centered and scaled sequence of the estimation errors is shown to have a diffusion limit.

Analyzing Convergence and Rates of Convergence of Particle Swarm Optimization Algorithms Using Stochastic Approximation Methods

This article presents a novel relationship between the duty cycle and power supply noise (PSN) for a feedback control circuit of a dc–dc buck converter. The derived relation is equally valid for the other high-speed circuits. Based on the derived relation, the closed-form expressions of the harmonics quantities for the dc–dc buck converter (including feedback circuitry) and power delivery network (PDN) are developed. The derived expressions of the distortions include the effect of small variations at the power supply and input dc terminals. A combination of two techniques, the Volterra series and the estimation-by-inspection methods, are used to derive the nonlinear quantities. The estimation-by-inspection method is used to model the feedback circuit, including the effects of PSN. The Volterra series derive the nonlinear quantities of the converter. The analytical results are compared with the simulation results for both the examples (designed in 180-nm LDMOS technology) in terms of mean percentage error (MPE) and computational (CPU) time.

Design and Distortion Analysis of a Power Delivery Network in the Presence of Internal Supply Noise

An on-chip high-frequency sinusoidal signal gener-ator with a calibration circuit based on a coarse-fine delay cell is presented in this work. The harmonic cancellation principle is used for signal generation by adding scaled and time-shifted versions of a periodic signal. However, as the output frequency increases in the GHz range, the harmonic cancellation can be severely affected by non-idealities such as mismatch and variations on timing parameters (phase difference, duty cycle) of the time-shifted signals. This degrades the spectral purity of the output signal. To counter this, a calibration circuit based on a coarse-fine delay cell is integrated into the system to correct the timing parameters of the signal. Simulation results show a THD better than -60 dB in the frequency range from 500 MHz to 2GHz.

Special Session: A high-frequency sinusoidal signal generation using harmonic cancellation

Harmonic cancellation techniques have been exploited for the on-chip generation of high-linearity sinusoidal test stimuli. The sinusoidal signal is generated by combining time-shifted and scaled versions of a periodical signal, in such a way that by properly choosing the time-shifts and weights, the lower order harmonics are canceled. However, process variations and mismatch can degrade the effectiveness of the harmonic cancellation, since precise time-shifts and scale ratios are required. In this regard, timing inaccuracies are especially harmful in the implementation of high-speed harmonic cancelling generators. In this paper, we propose an on-chip calibration architecture that can correct the phase-shift and duty-cycle of the signals with the help of a negative feedback loop. Electrical simulation results at transistor level show the feasibility of the calibration technique for a sinusoidal signal generator implemented in ST 28 nm FD-SOI technology. Obtained results show a Total Harmonic Distortion (THD) better than -60 dB after calibration in an output frequency range from 200 MHz to 4 GHz.

On-chip calibration for high-speed harmonic cancellation-based sinusoidal signal generators

Hardware accelerators have gained immense popularity in recent times for a varied range of healthcare applications. With the growth of edge computing, a large number of sensors can be integrated to enable lightweight computing for processing information. Over the years, there has been significant improvement in deep learning algorithms that offer exciting opportunities for their deployment even in safety-critical biomedical and healthcare applications. A detailed review and discussion on multiple challenges in the design of hardware acceleration catering to healthcare applications are presented in this paper. A wide range of generalized novel architectures and devices offers certain distinct advantages over the conventional processing units. Despite this development, the power and resource constraints of these platforms create significant hindrances in the acceleration of these high-risk medical applications. An elaborate analysis of the range of solutions to overcome these obstacles as well as a perspective on the need to address reliability and security concerns are presented. An alternative correct-by-construction accelerator design methodology is also proposed.

Hardware Accelerator Design for Healthcare Applications: Review and Perspectives

A novel uniplanar electromagnetic band-gap structure to maintain power integrity by suppressing simultaneous switching noise is presented. The proposed EBG structure is having stop-band from 600 MHz to 5.3 GHz and can be used as power plane in high speed systems for minimizing the power noise. Suppression of resonant cavity modes of power plane by EBG structure is shown. Simulation results are verified by measurements and compared with the earlier published structures.

Jai Narayan Tripathi

Papers

Design and Distortion Analysis of a Power Delivery Network in the Presence of Internal Supply Noise

Special Session: A high-frequency sinusoidal signal generation using harmonic cancellation

On-chip calibration for high-speed harmonic cancellation-based sinusoidal signal generators

Hardware Accelerator Design for Healthcare Applications: Review and Perspectives

A novel EBG power plane structure for suppressing SSN in high speed systems