Jesse Surprise

TL;DR: The IBM Z microprocessor in the z14 system has been redesigned to improve performance, system capacity, and security over the previous z13 system, and is designed in Global Foundries 14nm high performance SOI FinFET technology with 17 layers of copper interconnect.

TL;DR: The latest IBM Z microprocessor in the z15 system has been redesigned to have improved performance, system capacity and security over the previous z14 system while maintaining the central processor (CP) and system controller (SC) chip die sizes at 696mm2 in the GlobalFoundries 14nm high performance SOI FinFET technology and 17 layers of copper interconnect.

TL;DR: Improvements to the IBM z14 microprocessor chipset's power management architecture for managing power-supply noise and changes to the simulation environment are discussed, targeted at increasing both the number of simulation cycles and simulation logic coverage.

TL;DR: All aspects of the circuit and physical design of these chips, including both digital logic and custom array implementation, are discussed, along with some of the checks needed to ensure a robust, reliable, and high-frequency product.

TL;DR: The IBM z15 system improves upon the prior-generation z14 design within the same chip footprint and technology node, while featuring the addition of two cores, 33%/100%/43% additional L2/L3/L4 cache, as well as additional core features and on-chip accelerators.