On the wrong assignment of the XPS O1s signal at 531–532 eV attributed to oxygen vacancies in photo- and electro-catalysts for water splitting and other materials applications

The composite of tungsten-doped SnO2 and reduced graphene oxide was synthesized through a simple one-pot hydrothermal method. According to the structural characterization of the composite, tungsten ions were doped in the unit cells of tin dioxide rather than simply attaching to the surface. Tungsten-doped SnO2 was in situ grown on the surface of graphene sheet to form a three-dimensional conductive network that enhanced the electron transportation and lithium-ion diffusion effectively. The issues of SnO2 agglomeration and volume expansion could be also avoided because the tungsten-doped SnO2 nanoparticles were homogeneously distributed on a graphene sheet. As a result, the nanocomposite electrodes of tungsten-doped SnO2 and reduced graphene oxide exhibited an excellent long-term cycling performance. The residual capacity was still as high as 1100 mA h g–1 at 0.1 A g–1 after 100 cycles. It still remained at 776 mA h g–1 after 2000 cycles at the current density of 1A g–1.

In Situ Synthesis of Tungsten-Doped SnO2 and Graphene Nanocomposites for High-Performance Anode Materials of Lithium-Ion Batteries

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p‐Doping of Copper(I) Thiocyanate (CuSCN) Hole‐Transport Layers for High‐Performance Transistors and Organic Solar Cells

This review aims to provide a technical roadmap and progress update for backplane thin film transistors (TFTs) used in organic light emitting diodes flat panel displays and next-generation flexible...

https://www.tandfonline.com/doi/pdf/10.1080/15980316.2020.1818641

Recent progress in the development of backplane thin film transistors for information displays

In today's society, displays are indispensable for digital interaction and personal contact. Therefore, the development of displays is an urgent need for the next generation. Leading the commercialization trends is the development of industrial, high-resolution, portable, and multifunctional displays. Moreover, for small-size portable displays, the most critical factor affecting future applications is their flexibility. Among the various materials that can act as the channel layer, low-temperature polycrystalline silicon (LTPS) is a potential candidate for next-generation portable displays, which require high resolution and stable reliability, and which can achieve virtual reality applications. This article is a review of the development of the LTPS thin-film transistors (TFTs) on soft and flexible electronics, especially the effect of mechanical strain. This article starts by providing an overview of the difficulties in fabricating LTPS TFTs on flexible substrates. The physical mechanism corresponding to each degradation caused by mechanical stress is presented next. Finally, to support the development of the flexible technologies and realize their commercialization, methods to overcome these mechanical strain-induced degradations are reported in three different aspects by understanding the physical degradation model.

Flexible low-temperature polycrystalline silicon thin-film transistors

Influence of channel layer thickness on the stability of amorphous indium zinc oxide thin film transistors

Thin film transistors (TFTs) with silicon-doped tin oxide (TSO) as channel layer were prepared by radio frequency magnetron sputtering. The decreased defect-state-related peak in photoluminescence (PL) excitation spectra and oxygen-vacancy-related O 1s peak in X-ray photoelectron spectroscopy (XPS) with increasing Si content, accompanied by the decreased off-state current and positive shift of turn-on voltage, confirms that silicon can be a good carrier suppressor. The optimum TFT performance after annealing at 300 °C was achieved at Si content 5.4 at.%, with saturation mobility of 5.3 cm2 V−1 s−1, turn-on voltage of −0.2 V, and on-off current ratio of 3.3 × 106, respectively. Increasing the annealing temperature is useful to improve the mobility, but the polycrystalline structure formed above 350 °C goes against the uniformity of oxide TFTs.

Effects of silicon doping on the performance of tin oxide thin film transistors

The influences of bismuth doping contents on the structure, morphology and electrical properties of amorphous bismuth-doped tin oxide (a-TBO) thin films have been investigated. With the increase of Bi content, the resistivity of TBO films monotonously increases due to the decreased oxygen vacancies. The thin-film transistors (TFTs) with a-TBO films as channel layers have been prepared on SiO2–Si substrate. Through the comparison of the transfer characteristic curves of the TFTs with different Bi contents, it is observed that Bi doping is useful to suppress the excess carrier concentration and improve the performances. TBO-TFTs with Bi content 2.7 at.% show the optimum performances, with a field effect mobility of 4.7 cm $^{2}\text{V}^{-1}\text{s}^{-1}$ , a threshold voltage of −3.9 V, a subthreshold swing value of 1.3 V/decade, and an ON–OFF current ratio of $2.3 \,\, \times \,\, 10^{6}$ . In addition, the bias stress stabilities of intrinsic SnO2 TFTs and a-TBO TFTs were compared and analyzed.

Characteristic of Bismuth-Doped Tin Oxide Thin-Film Transistors

Amorphous In-Ga-Zn-O thin-film transistors on flexible substrates were prepared to investigate H2O adsorption under negative bias stress (NBS). Shorter channel lengths induce a more seriously deteriorated NBS stability due to the stronger electric field near the source or drain electrode. With increasing channel width, the NBS instability increases to a peak and then slightly decreases. Integrated Systems Engineering Technology Computer-aided Design (ISE-TCAD) simulation confirms that the electric field near the source/drain in the etch-stop layer is relatively dense, especially near the channel edges. The electric field direction is also confirmed to have significant effects on the H2O adsorption process.

H2O adsorption on amorphous In-Ga-Zn-O thin-film transistors under negative bias stress

Tungsten doped tin oxide thin film transistors (TWO-TFTs) were fabricated by radio frequency magnetron sputtering. With TWO thin films as the channel layers, the TFTs show lower off-current and positive shift turn-on voltage than the intrinsic tin oxide TFTs, which can be explained by the reason that W doping is conducive to suppress the carrier concentration of the TWO channel layer. It is important to elect an appropriate channel thickness for improving the TFT performance. The optimum TFT performance in enhancement mode is achieved at W doping content of 2.7 at% and channel thickness of 12 nm, with the saturation mobility, turn-on voltage, subthreshold swing value and on–off current ratio of 5 cm2 V−1 s−1, 0.4 V, 0.4 V/decade and 2.4 × 106, respectively.

http://iopscience.iop.org/article/10.1088/0022-3727/48/43/435108/pdf

Jianwen Yang

Papers

Influence of channel layer thickness on the stability of amorphous indium zinc oxide thin film transistors

Effects of silicon doping on the performance of tin oxide thin film transistors

Characteristic of Bismuth-Doped Tin Oxide Thin-Film Transistors

H2O adsorption on amorphous In-Ga-Zn-O thin-film transistors under negative bias stress

Investigation of tungsten doped tin oxide thin film transistors