Juyoung Han

TL;DR: Time-to-digital converter (TDC) chopping technique, TDC fine conversion through successive approximation register analog- to-digital converters (SARADCs), and TDC nonlinearity calibration improve integrated phase noise and fractional spurs.

TL;DR: In this paper, a multiband wideband code-division multiple access/high-speed downlink packet access direct-conversion receiver to cover all six Third-Generation Partnership Project bands is implemented in a 0.13-μm CMOS process.

TL;DR: This article presents a fully integrated stand-alone narrowband Internet-of-Things (NB-IoT) and global navigation satellite system (GNSS) system-on-chip (SoC) to integrate all necessary blocks such as an RF transceiver, a power management system (PMIP), and a clock management system to save a bills- of-material (BOM) cost.

TL;DR: A TDC chopping technique, fine-conversion through SARADCs and TDC nonlinearity calibration to improve IPN and fractional spurs are introduced and a digital fractional-N PLL is presented.

TL;DR: This work aims for an all-in-one system to integrate all necessary blocks to support power scenarios of NB-IoT, and an RF transceiver is integrated to support multiband cellular IoT and the global-navigation satellite system (GNSS) with a CMOS RF power amplifier.