Learn the basic properties and designs of modern VLSI devices, as well as the factors affecting performance, with this thoroughly updated second edition. The first edition has been widely adopted as a standard textbook in microelectronics in many major US universities and worldwide. The internationally-renowned authors highlight the intricate interdependencies and subtle tradeoffs between various practically important device parameters, and also provide an in-depth discussion of device scaling and scaling limits of CMOS and bipolar devices. Equations and parameters provided are checked continuously against the reality of silicon data, making the book equally useful in practical transistor design and in the classroom. Every chapter has been updated to include the latest developments, such as MOSFET scale length theory, high-field transport model, and SiGe-base bipolar devices.

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Fundamentals of Modern VLSI Devices

We have demonstrated a 70-nm n-channel tunneling field-effect transistor (TFET) which has a subthreshold swing (SS) of 52.8 mV/dec at room temperature. It is the first experimental result that shows a sub-60-mV/dec SS in the silicon-based TFETs. Based on simulation results, the gate oxide and silicon-on-insulator layer thicknesses were scaled down to 2 and 70 nm, respectively. However, the ON/ OFF current ratio of the TFET was still lower than that of the MOSFET. In order to increase the on current further, the following approaches can be considered: reduction of effective gate oxide thickness, increase in the steepness of the gradient of the source to channel doping profile, and utilization of a lower bandgap channel material

Tunneling Field-Effect Transistors (TFETs) With Subthreshold Swing (SS) Less Than 60 mV/dec

This paper reports the studies of the inversion layer mobility in n- and p-channel Si MOSFET's with a wide range of substrate impurity concentrations (10/sup 15/ to 10/sup 18/ cm/sup -3/). The validity and limitations of the universal relationship between the inversion layer mobility and the effective normal field (E/sub eff/) are examined. It is found that the universality of both the electron and hole mobilities does hold up to 10/sup 18/ cm/sup -3/. The E/sub eff/ dependences of the universal curves are observed to differ between electrons and holes, particularly at lower temperatures. This result means a different influence of surface roughness scattering on the electron and hole transports. On substrates with higher impurity concentrations, the electron and hole mobilities significantly deviate from the universal curves at lower surface carrier concentrations because of Coulomb scattering by the substrate impurity. Also, the deviation caused by the charged centers at the Si/SiO/sub 2/ interface is observed in the mobility of MOSFET's degraded by Fowler-Nordheim electron injection. >

https://www-inst.eecs.berkeley.edu/~ee230/sp08/takagi%20universal%20mobility%20I%201994.pdf

On the universality of inversion layer mobility in Si MOSFET's: Part I-effects of substrate impurity concentration

International Technology Roadmap for Semiconductors 2003の要求清浄度について － シリコンウエハ表面と雰囲気環境に要求される清浄度, 分析方法の現状について －

Afully analytical MOS transistor model dedicated to the design and analysis of low-voltage, low-current analog circuits is presented. All the large-and small-signal variables, namely the currents, the transconductances, the intrinsic capacitances, the non-quasi-static transadmittances and the thermal noise are continuous in all regions of operation, including weak inversion, moderate inversion, strong inversion, conduction and saturation. The same approach is used to derive all the equations of the model: the weak and strong inversion asymptotes are first derived, then the variables of interest are normalized and linked using an appropriate interpolation function. The model exploits the inherent symmetry of the device by referring all the voltages to the local substrate. It is shown that the inversion chargeQ inv is controlled by the voltage differenceV P — Vch whereV ch is the channel voltage, defined as the difference between the quasi-Fermi potentials of the carriers. The pinch-off voltageV P is defined as the particular value of Vch, such that the inversion charge is zero for a given gate voltage. It depends only on the gate voltage and can be interpreted as the equivalent effect of the gate voltage referred to the channel. The various modes of operation of the transistor are then presented in terms of voltagesV P —V S andV P —V D Using the charge sheet model with the assumption of constant doping in the channel, the drain currentIDis derived and expressed as the difference between a forward componentI F and a reverse componentI R. Each of these is proportional to a function ofV P —V S respectivelyV P —V D through a specific currentI S This function is exponential in weak inversion and quadratic in strong inversion. The current in the moderate inversion region is then modelled by using an appropriate interpolation function resulting in a continuous expression valid from weak to strong inversion. A quasi-static small-signal model including the transconductances and the intrinsic capacitances is obtained from an accurate evaluation of the total charges stored on the gate and in the channel. The transconductances and the intrinsic capacitances are modelled in moderate inversion using the same interpolation function and without any additional parameters. This small-signal model is then extended to higher frequencies by replacing the transconductances by first order transadmittances obtained from a non-quasi-static calculation. All these transadmittances have the same characteristic time constant which depends on the bias condition in a continuous manner. To complete the model, a general expression for the thermal noise valid in all regions of operation is derived. This model has been successfully implemented in several computer simulation programs and has only 9 physical parameters, 3 fine tuning fitting coefficients and 2 additional temperature parameters.

An analytical MOS transistor model valid in all regions of operation and dedicated to low-voltage and low-current applications

An analytical expression has been derived for the electron and hole mobility in silicon based on both experimental data and modified Brooks-Herring theory of mobility. The resulting expression allows one to obtain electron and hole mobility as a function of concentration up to \sim 10^{20} cm-3in an extended and continuous temperature range (250-500 K) within ± 13 percent of the reported experimental values.

Electron and hole mobilities in silicon as a function of concentration and temperature

This study discusses MOS transistor models and their parameters required for VLSI simulation of MOS-integrated circuits. It gives detailed presentation of model parameter determination for MOS models. Various models are developed ranging from simple to more sophisticated models that take into account new physical effects observed in submicron devices used in today's MOS VLSI technology. The assumptions used to arrive at the models are emphasized so that the accuracy of the model in describing the device characteristics are clearly understood. Understanding these models is essential when designing circuits for the state-of-the-art MOS ICs. Since threshold voltage is the single-most important MOSFET parameter, a full chapter is devoted to the development of the device threshold voltage model. Due to the importance of designing reliable circuits, the device reliability models, as applied for circuit simulations, are also covered. Since the device parameters vary due to inherent processing variations, how to arrive at worst-case design parameters are also covered. Presentation of the material is such that even an undergraduate student, not well familiar with semiconductor device physics, can understand the intricacies of MOSFET modeling. The book serves as a technical source in the area of MOSFET modeling for state-of-the-art MOSFET technology for both practicing device and circuit engineers, and engineering students interested in the area.

MOSFET Models for VLSI Circuit Simulation: Theory and Practice

MOSFET Models for VLSI Circuit Simulation

The results of minority-carrier lifetime measurements in heavily phosphorus-doped n+diffused layers of p-n junction diodes using a spectral response technique are reported in this paper. Exact modeling of current-flow equations, modified to include bandgap reduction due to high carrier concentration and Auger recombination, is used to compute the dependence of diffused-layer photocurrent J pth on the incident light energy and intensity. The photocurrent in the diffused layer is also obtained by subtracting the theoretical value of the space charge and uniformly doped p-region component from the experimentally measured photocurrent of the diode at each wavelength. Note that all calculated values based on light intensity include computed transmittance/reflectance through the oxide layer at each wavelength. The comparison of the values of J pth with J pexp , using nonlinear least square techniques, then directly gives the lifetime profile in the diffused layer. A simple expression is given for lifetime as a function of doping which may be used in modeling and prediction of device performance. Using this experimental technique it was found that the lifetime in the diffused layer is an order of magnitude less than that corresponding to uniformly doped bulk-silicon values and is very much process dependent; its value being 3.72 × 10-11s for surface concentration of 3.0 × 1020cm-3and increases to 2.9 × 10-8s at doping concentration of 1.0 × 1017cm-3.

Modeling and measurement of minority-carrier lifetime versus doping in diffused layers of n + -p silicon diodes

Overview Review of Basic Semiconductor and pn Junction Theory MOS Transistor Structure and Operation MOS Capacitor Threshold Voltage MOSFET DC Model Dynamic Model Modeling Hot-Carrier Effects Data Acquisition and Model Parameter Measurements Model Parameter Extraction Using Optimization Method SPICE Diode and MOSFET Models and Their Parameters Statistical Modeling and Worst-Case Design Parameters

Narain D. Arora

Papers

Electron and hole mobilities in silicon as a function of concentration and temperature

MOSFET Models for VLSI Circuit Simulation: Theory and Practice

MOSFET Models for VLSI Circuit Simulation

Modeling and measurement of minority-carrier lifetime versus doping in diffused layers of n + -p silicon diodes

Mosfet modeling for vlsi simulation: theory and practice