scispace - formally typeset
N

Navab Singh

Researcher at Agency for Science, Technology and Research

Publications -  355
Citations -  8869

Navab Singh is an academic researcher from Agency for Science, Technology and Research. The author has contributed to research in topics: Nanowire & CMOS. The author has an hindex of 44, co-authored 346 publications receiving 7946 citations. Previous affiliations of Navab Singh include Singapore Science Park & National University of Singapore.

Papers
More filters
Journal ArticleDOI

FePt Patterned Media Fabricated by Deep UV Lithography Followed by Sputtering or PLD

TL;DR: In this article, continuous and patterned FePt films (40 nm) were fabricated on silicon (100) substrates using deep ultraviolet lithography with the wavelength of 248 nm followed by sputter deposition or pulsed laser deposition at room temperature, liftoff, and postannealing in vacuum.
Journal ArticleDOI

Magnetoresistance behavior of bi-component antidot nanostructures

TL;DR: In this article, the magnetoresistance behavior of bi-component antidot nanostructures consisting of the Ni80Fe20 antidot with holes filled with Fe dots was investigated.
Patent

Resistive memory arrangement and a method of forming the same

TL;DR: In this article, a resistive memory arrangement including a nanowire, and a resistor memory cell including a resistor changing material, was provided, where at least a section of the resistive layer is arranged covering at least part of a surface of the nanowires and a conductive layer was arranged on at least some part of the resistor layer.
Journal ArticleDOI

Quantization of spin waves in oval-shaped nanorings

TL;DR: In this paper, the spin wave properties of a single isolated permalloy nanoring were analyzed in terms of quantized Damon-Eshbach modes due to lateral confinement in the finite size rings.
Journal ArticleDOI

Charge-Based Capacitance Measurement Technique for Nanoscale Devices: Accuracy Assessment Based on TCAD Simulations

TL;DR: In this article, the authors carried out extensive mixed device and circuit-mode simulations to calibrate the charge-based capacitance measurement technique specifically for subfemto-farad nanowire-based device capacitance.