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Rakesh Malik

Researcher at STMicroelectronics

Publications -  51
Citations -  329

Rakesh Malik is an academic researcher from STMicroelectronics. The author has contributed to research in topics: Power integrity & Jitter. The author has an hindex of 9, co-authored 51 publications receiving 266 citations.

Papers
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Proceedings ArticleDOI

Baseband OFDM physical layer implementation on FPGA using SystemVue

TL;DR: A fast prototype design from concept to implementation of an OFDM system is carried out using Keysight Technologies Tool `SYSTEMVUE''s model based FPGA flow rapid prototyping and high gain in design time can be achieved.
Proceedings ArticleDOI

Distortion analysis for a DC-DC buck converter

TL;DR: From the analysis, the results are 96 %, 97 % and 90 % matched with the simulation results when the amplitude of the input ripple varies from 0 V to 1.8 V.
Proceedings ArticleDOI

Generic system for characterization of BER and JTOL of high speed serial links

TL;DR: A generic system for Bit Error Rate (BER) and Jitter tolerance (JTOL) characterization of Physical Layers for high speed serial links is developed and demonstrated and offers an added advantage of “true receiver only” characterization.
Patent

Generic bit error rate analyzer for use with serial data links

TL;DR: In this article, a test apparatus for a device under test is described, which includes a voltage translator coupled to receive test data from the test data over a physical interface, using one of a plurality of I/O standards.