Statistical Methods For Agricultural Workers

Cuckoo search (CS) was introduced by Xin-She Yang and Suash Deb in 2009, and it has attracted great attention due to its promising efficiency in solving many optimization problems and real-world applications. In the last few years, many papers have been published regarding cuckoo search, and the relevant literature has expanded significantly. This chapter summarizes briefly the majority of the literature about cuckoo search in peer-reviewed journals and conferences found so far. These references can be systematically classified into appropriate categories, which can be used as a basis for further research.

Cuckoo Search: A Brief Literature Review

Provided is a video coding method and a video decoding method increasing the resolution and quality of images while suppressing an amount of data required for increasing the resolution. A video coding apparatus includes a first orthogonal transformation unit performing discrete cosine transform on an input picture signal, a low-pass filter performing low-pass filtering on the input picture signal, a downsampling unit downsampling the resolution of a low-frequency image signal, a coding unit compressing and coding a reduced image signal, a local decoding unit decoding a coded bit stream, a second orthogonal transformation unit performing discrete cosine transform on a decoded image signal, and a modification information generation unit generating, based on input image DCT coefficients and decoded image DCT coefficients, coefficient modification information used for modifying orthogonal transformation coefficients obtained by performing orthogonal transformation on a decoded video signal obtained from a coded bit stream.

Video encoding method and video decoding method

Cuckoo Search (CS) algorithm is nature inspired global optimization algorithm based on the brood parasitic behavior of cuckoos. It has proved to be an efficient algorithm as it has been successfully applied to solve a large number of problems of different areas. CS employs Levy flights to generate step size and to search the solution space effectively. The local search is carried out using switch probability in which certain percentages of solutions are removed. Though CS is an effective algorithm, still its performance can be improved by incorporating the exploration and exploitation during the search process. In this work, three modified versions of CS are proposed to improve the properties of exploration and exploitation. All these versions employ Cauchy operator to generate the step size instead of Levy flights to efficiently explore the search space. Moreover, two new concepts, division of population and division of generations, are also introduced in CS so as to balance the exploration and exploitation. The proposed versions of CS are tested on 24 standard benchmark problems with different dimension sizes and varying population sizes and the effect of probability switch has been studied. Apart from this, the best of the proposed versions is also tested on CEC 2015 benchmark suite. The modified algorithms have been statistically tested in comparison to the state-of-the-art algorithms, namely grey wolf optimization (GWO), differential evolution (DE), firefly algorithm (FA), flower pollination algorithm (FPA) and bat algorithm (BA). The numerical and statistical results prove the superiority of the proposed versions with respect to other popular algorithms available in the literature.

New cuckoo search algorithms with enhanced exploration and exploitation properties

In digital video image encoding and decoding, a filter type is selected based on symmetrical properties of the images and coefficient values of an interpolation filter are calculated based on the selected filter type. Coefficient values, filter tap-length and selected filter-type are provided in the encoded video data. Coefficient values are also calculated based on a prediction signal representative of the different between a video frame and a reference image. The prediction signal is calculated from the reference image based on a predefined base filter and motion estimation performed on the video frame. The predefined base filter has fixed coefficient values. Coefficient values are selected from interpolation of pixel values in a selected image segment in the video frame. Symmetry properties of images can be a vertical symmetry, a horizontal symmetry and a combination thereof, so that only a portion of the filter coefficients are coded.

Adaptive interpolation filters for video coding

A digital-to-analog converter has an output. An analog-to-digital converter senses a voltage at the output of the digital-to-analog converter and generates a digital voltage signal. A source mismatch estimator processes the digital voltage signal to output an error signal indicative of current source mismatch within the digital-to-analog converter. An error code generator generates a digital calibration signal from the error signal. The digital calibration signal is converted by a redundancy digital-to-analog converter to an analog compensation signal for application to the output of analog-to-digital converter to nullify effects of the current source mismatch.

Self-calibrated digital-to-analog converter

System level signal integrity and power integrity problems for high speed serial links have been explored in this paper. An example of the USB 2.0 IP has been used in this paper, but the analysis is generic for all serial links. This paper considers signal and power integrity as effects simultaneoulsy. A model is developed to optimize the performance of high speed serial link in terms of jitter and amplitude performance. Sensitivity analysis is carried out with a set of dependent parameters affecting the performance. Taguchi array optimization has been applied during the optimization process. Finally, reflection gain concept is also applied to further improve the performance for the eye diagram. A strong correlation between measured and simulated results is shown. A generic methodology for SI and PI for high speed serial links is presented with complete analysis of package, board, termination, squidd card, decoupling network etc. Index Terms—Signal integrity, power integrity, serial links, bit error rate (BER), high speed data transmission

Robust Optimization and Reflection Gain Enhancement of Serial Link System for Signal Integrity and Power Integrity

Signal Integrity (SI) and Power Integrity (PI) are the most critical issues for higher operational speeds in semiconductor industry. This work identifies and optimizes the parameters of board, package and termination environment, influencing the signal integrity and power integrity of serial link. System level model has been created for USB HSLINK taking into account the external parameters like board, package, measurement environment which influence the performance of the channel. Parameters variations appearing from manufactura-bility constraints, material property constraints, design tolerance etc affecting the serial link performance has been optimized using Taguchi method based on statistical co-analysis. Using the Taguchi statistical techniques, sensitivity analysis on parameter variations affecting HSLINK performance is analyzed and optimized for desired performance.

Robust optimization of serial link system for signal integrity and power integrity

A 0.065-mm2 single-channel calibration-free 12-b analog-to-digital converter (ADC) sampling at 600 MS/s in 28-nm ultrathin body bias fully depleted silicon on insulator (FD-SOI) is presented. The selected hybrid architecture, incorporating pipelined and asynchronous successive approximation register ADC, demonstrates advantages and suitability of different design techniques utilizing forward body bias (FBB) capability of FD-SOI. Using an FBB voltage range of 0–1.8 V has enabled an signal-to-noise plus distortion ratio (SNDR) improvement of more than 9 dB. An integrated body bias generator ensures the required voltages for FBB. This paper demonstrates 61.5-dB and 60.7-dB SNDR at low and Nyquist input frequency, respectively, at 600-MS/s sampling frequency. The Walden FoM of 37.2 fJ/conv-step and Schreier FoM of 162.5 dB at 600 MS/s are achieved in Nyquist conditions. Speed robustness of the architecture has been demonstrated by achieving 57-dB SNDR at 800MS/s, >50-dB SNDR up to 950 MS/s, and 58.5-dB SNDR till 500-MHz input frequency at 600 MS/s.

A 0.065-mm 2 19.8-mW Single-Channel Calibration-Free 12-b 600-MS/s ADC in 28-nm UTBB FD-SOI Using FBB

Random jitter (RJ) estimation based on Tail Fit algorithm are generally inaccurate in presence of deterministic components like the presence of sinusoidal jitter (SJ) and duty cycle distortion (DCD). Addition of deterministic jitter changes the standard deviation of the tail region of resulting jitter probability density function. A new methodology for random jitter estimation in presence of sinusoidal jitter and duty cycle distortion is presented. The method involves calculation of mathematical correction factor, which are derived and used to calculate the precise value of random jitter. The proposed methodology is validated by inducing known jitter sources in real channel simulator of ADS from Agilent.

Rakesh Malik

Papers

Self-calibrated digital-to-analog converter

Robust Optimization and Reflection Gain Enhancement of Serial Link System for Signal Integrity and Power Integrity

Robust optimization of serial link system for signal integrity and power integrity

A 0.065-mm 2 19.8-mW Single-Channel Calibration-Free 12-b 600-MS/s ADC in 28-nm UTBB FD-SOI Using FBB

Mitigating the impact of sinusoidal jitter and duty cycle distortion on random jitter estimation by Tailfit algorithm