Semiconductor Power Devices

Silicon carbide (SiC) switching power devices (MOSFETs, JFETs) of 1200 V rating are now commercially available, and in conjunction with SiC diodes, they offer substantially reduced switching losses relative to silicon (Si) insulated gate bipolar transistors (IGBTs) paired with fast-recovery diodes. Low-voltage industrial variable-speed drives are a key application for 1200 V devices, and there is great interest in the replacement of the Si IGBTs and diodes that presently dominate in this application with SiC-based devices. However, much of the performance benefit of SiC-based devices is due to their increased switching speeds ( di/dt, dv/ dt), which raises the issues of increased electromagnetic interference (EMI) generation and detrimental effects on the reliability of inverter-fed electrical machines. In this paper, the tradeoff between switching losses and the high-frequency spectral amplitude of the device switching waveforms is quantified experimentally for all-Si, Si-SiC, and all-SiC device combinations. While exploiting the full switching-speed capability of SiC-based devices results in significantly increased EMI generation, the all-SiC combination provides a 70% reduction in switching losses relative to all-Si when operated at comparable dv/dt. It is also shown that the loss-EMI tradeoff obtained with the Si-SiC device combination can be significantly improved by driving the IGBT with a modified gate voltage profile.

An Experimental Investigation of the Tradeoff between Switching Losses and EMI Generation With Hard-Switched All-Si, Si-SiC, and All-SiC Device Combinations

During recent years, silicon carbide (SiC) power electronics has gone from being a promising future technology to being a potent alternative to state-of-the-art silicon (Si) technology in high-efficiency, highfrequency, and high-temperature applications. The reasons for this are that SiC power electronics may have higher voltage ratings, lower voltage drops, higher maximum temperatures, and higher thermal conductivities. It is now a fact that several manufacturers are capable of developing and processing high-quality transistors at cost that permit introduction of new products in application areas where the benefits of the SiC technology can provide significant system advantages.

Silicon Carbide Power Transistors: A New Era in Power Electronics Is Initiated

This paper addresses the influences of device and circuit mismatches on paralleling the silicon carbide (SiC) MOSFETs. Comprehensive theoretical analysis and experimental validation from paralleled discrete devices to paralleled dies in multichip power modules are first presented. Then, the influence of circuit mismatch on paralleling SiC MOSFETs is investigated and experimentally evaluated for the first time. It is found that the mismatch of the switching loop stray inductance can also lead to on-state current unbalance with inductive output current, in addition to the on-state resistance of the device. It further reveals that circuit mismatches and a current coupling among the paralleled dies exist in a SiC MOSFET multichip power module, which is critical for the transient current distribution in the power module. Thus, a power module layout with an auxiliary source connection is developed to reduce such a coupling effect. Finally, simulations and experimental tests are carried out to validate the analysis and effectiveness of the developed layout.

/pdf/influences-of-device-and-circuit-mismatches-on-paralleling-1pesc7npuc.pdf

Influences of Device and Circuit Mismatches on Paralleling Silicon Carbide MOSFETs

An overview on the history of the development of insulated gate bipolar transistors (IGBTs) as one key component in today’s power electronic systems is given; the state-of-the-art device concepts are explained as well as an detailed outlook about ongoing and foreseeable development steps is shown. All these measures will result on the one hand in ongoing power density and efficiency increase as important contributors for worldwide energy saving and environmental protection efforts. On the other hand, the exciting competition of more maturing Si IGBT technology with the wide bandgap successors of GaN and SiC switches will go on.

IGBT History, State-of-the-Art, and Future Prospects

State-of-the-art silicon carbide switches have current ratings that are not sufficiently high to be used in high-power converters. It is, therefore, necessary to connect several switches in parallel in order to reach sufficient current capabilities. An investigation of parallel-connected normally ON silicon carbide JFETs is presented in this paper. The device parameters that play the most important role for the parallel connection are the pinch-off voltage, the gate-source reverse breakdown voltage, the spread in the on-state resistances, and the variations in static transfer characteristics of the devices. Moreover, it is experimentally shown that a fifth factor affecting the parallel connection of the devices is the parasitic inductances of the circuit layout. The temperature dependence of the gate-source reverse breakdown voltages is analyzed for two different designs of silicon carbide JFETs. If the spread in the pinch-off and gate-source reverse breakdown voltages is sufficiently large, there might be no possibility for a stable off-state operation of a pair of transistors without forcing one of the gate voltages to exceed the breakdown voltage. A solution to this problem using individual gate circuits for the JFETs is given. The switching performance of two pairs of parallel-connected devices with different combinations of parameters is compared employing two different gate-driver configurations. Three different circuit layouts are considered and the effect of the parasitic inductances is experimentally investigated. It is found that using a single gate circuit for the two mismatched JFETs may improve the switching performance and therefore the distribution of the switching losses significantly. Based on the measured switching losses, it is also clear that regardless of the design of the gate drivers, the lowest total switching losses for the devices are obtained when they are symmetrically placed.

Challenges Regarding Parallel Connection of SiC JFETs

This paper gives an overview about different failure mechanisms which limit the safe operating area of power devices. It is demonstrated how the device internal processes can be investigated by means of device simulation. For instance, the electrothermal simulation of high-voltage diode turn-off reveals how a backside filament transforms into a continuous filament connecting the anode and cathode and how this can be accompanied with a transition from avalanche-induced into thermally driven carrier generation. A similar current destabilization may occur during insulated-gate bipolar transistor turn-off with a high turn-off rate, when the channel is closed quickly leading to strong dynamic avalanche. It is explained how the current filamentation depends on substrate resistivity, device thickness, channel width, and switching conditions (gate resistor and overcurrent). Filamentation processes during short-circuit events are discussed, and possible countermeasures are suggested. A mechanism of a periodically emerging and vanishing filament near the edge of the chip is presented. Examples on current destabilizing effects in gate turn-off thyristors, integrated gate-commutated thyristors, and metal-oxide-semiconductor field-effect transistors are given, and limitations of current device simulation are discussed.

Limiting Factors of the Safe Operating Area for Power Devices

The effects during reverse recovery of pin power diodes are determined by free carriers and their interaction with the electric field. A density of free carriers higher than the background doping will easily occur in space-charge regions during reverse recovery of high-voltage silicon devices. As a result, a high electric-field strength combined with avalanche generation occurs at the p-n junction. However, if a second region with high electric-field strength arises at the nn+-junction, the situation can become critical. If the second electric-field peak can be suppressed, it is possible to make diodes that are very rugged and show a significantly improved soft-recovery behavior.

The $\hbox{nn}^{+}$ -Junction as the Key to Improved Ruggedness and Soft Recovery of Power Diodes

Dynamic avalanche in bipolar power devices

An analysis of the plasma front velocities during turnoff of a power diode is used to explain the differences between the formation and the behavior of cathode-side and anode-side filaments. Device simulations show, how cathode-side filaments may trigger a thermal runaway at the end of a reverse-recovery period of diodes turned off with extremely high current rates operating the diode in a regime far away from the safe operating area. From the transient voltage curve, the analysis of the reverse-recovery charge as a function of the dc-link voltage and an analysis of the turnoff transients in the current-voltage phase space, it is, however, deduced that the appearance of a cathode-side filament by itself does not necessarily lead to diode destruction. The transformation of the initially avalanche-generated filaments into filaments that are essentially driven by thermal mechanism seems to be a further important condition for device destruction.

Roman Baburske

Papers

Challenges Regarding Parallel Connection of SiC JFETs

Limiting Factors of the Safe Operating Area for Power Devices

The $\hbox{nn}^{+}$ -Junction as the Key to Improved Ruggedness and Soft Recovery of Power Diodes

Dynamic avalanche in bipolar power devices

Cathode-Side Current Filaments in High-Voltage Power Diodes Beyond the SOA Limit