Electrons have a charge and a spin, but until recently these were considered separately. In classical electronics, charges are moved by electric fields to transmit information and are stored in a capacitor to save it. In magnetic recording, magnetic fields have been used to read or write the information stored on the magnetization, which 'measures' the local orientation of spins in ferromagnets. The picture started to change in 1988, when the discovery of giant magnetoresistance opened the way to efficient control of charge transport through magnetization. The recent expansion of hard-disk recording owes much to this development. We are starting to see a new paradigm where magnetization dynamics and charge currents act on each other in nanostructured artificial materials. Ultimately, 'spin currents' could even replace charge currents for the transfer and treatment of information, allowing faster, low-energy operations: spin electronics is on its way.

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The emergence of spin electronics in data storage

Spin–orbit coupling (SOC) describes the relativistic interaction between the spin and momentum degrees of freedom of electrons, and is central to the rich phenomena observed in condensed matter systems. In recent years, new phases of matter have emerged from the interplay between SOC and low dimensionality, such as chiral spin textures and spin-polarized surface and interface states. These low-dimensional SOC-based realizations are typically robust and can be exploited at room temperature. Here we discuss SOC as a means of producing such fundamentally new physical phenomena in thin films and heterostructures. We put into context the technological promise of these material classes for developing spin-based device applications at room temperature. The interplay between spin–orbit coupling and two-dimensionality has led to the emergence of new phases of matter, such as spin-polarized surface states in topological insulators, interfacial chiral spin interactions, and magnetic skyrmions in thin films, with great potential for spin-based devices. Substantial progress in the past decade in the fabrication and modelling of atomically precise interfaces and surfaces has led to the discovery of many electronic effects that are of interest for practical devices with novel functionalities. Christos Panagopoulos and colleagues review various such effects—and their technological potential—with a focus on the role of spin–orbit coupling, the fundamental interaction between the spin and charge degrees of freedom of an electron. Spin–orbit coupling can affect the electronic properties of materials at reduced dimensions, and the authors discuss the basic principles for understanding and engineering interfaces and surfaces in which spin–orbit coupling is harnessed. Examples are structures based on topological insulators where spin currents are generated or converted and magnetic layers where spin–orbit coupling leads to spin textures that can be controlled.

https://dr.ntu.edu.sg/bitstream/10356/82494/1/Emergent%20phenomena%20induced%20by%20spin%e2%80%93orbit%20coupling%20at%20surfaces%20and%20interfaces.pdf

Emergent phenomena induced by spin–orbit coupling at surfaces and interfaces

Review on spintronics: Principles and device applications

The rapid increase in information in the big-data era calls for changes to information-processing paradigms, which, in turn, demand new circuit-building blocks to overcome the decreasing cost-effectiveness of transistor scaling and the intrinsic inefficiency of using transistors in non-von Neumann computing architectures. Accordingly, resistive switching materials (RSMs) based on different physical principles have emerged for memories that could enable energy-efficient and area-efficient in-memory computing. In this Review, we survey the four physical mechanisms that lead to such resistive switching: redox reactions, phase transitions, spin-polarized tunnelling and ferroelectric polarization. We discuss how these mechanisms equip RSMs with desirable properties for representation capability, switching speed and energy, reliability and device density. These properties are the key enablers of processing-in-memory platforms, with applications ranging from neuromorphic computing and general-purpose memcomputing to cybersecurity. Finally, we examine the device requirements for such systems based on RSMs and provide suggestions to address challenges in materials engineering, device optimization, system integration and algorithm design. Resistive switching materials enable novel, in-memory information processing, which may resolve the von Neumann bottleneck. This Review focuses on how the switching mechanisms and the resultant electrical properties lead to various computing applications.

Resistive switching materials for information processing

The broad spectrum of electronic and optical properties exhibited by oxides offers tremendous opportunities for microelectronic devices, especially when a combination of properties in a single device is desired Here we describe the use of reactive molecular-beam epitaxy and pulsed-laser deposition to synthesize functional oxides, including ferroelectrics, ferromagnets, and materials that are both at the same time Owing to the dependence of properties on direction, it is often optimal to grow functional oxides in particular directions to maximize their properties for a specific application But these thin film techniques offer more than orientation control; customization of the film structure down to the atomic-layer level is possible Numerous examples of the controlled epitaxial growth of oxides with perovskite and perovskite-related structures, including superlattices and metastable phases, are shown In addition to integrating functional oxides with conventional semiconductors, standard semiconductor practices involving epitaxial strain, confined thickness, and modulation doping can also be applied to oxide thin films Results of fundamental scientific importance as well as results revealing the tremendous potential of utilizing functional oxide thin films to create devices with enhanced performance are described

/pdf/a-thin-film-approach-to-engineering-functionality-into-51t9902h5j.pdf

A Thin Film Approach to Engineering Functionality into Oxides

We have developed a new magnetic random access memory with current-induced domain wall (DW) motion (DW-motion MRAM). We confirmed its potential of 0.1-mA and 2-ns writing with sufficient thermal stability. The obtained properties indicate that this MRAM can replace conventional high-speed embedded memories.

Low-current perpendicular domain wall motion cell for scalable high-speed MRAM

As‐deposited superconducting thin films (∼0.1 μm) of YBa2Cu3O7−x have been prepared by pulsed laser deposition on (100) Si with buffer layers of BaTiO3/MgAl2O4. X‐ray diffraction studies reveal that the films grow epitaxially with the c axis preferentially oriented normal to the substrate surface. This is confirmed by ion channeling measurements along the (100) (normal to the surface) and (110) directions of the Si substrate showing a minimum yield of 54% along the (100), and 78% along the (110) axes using 2.8 MeV He++. Preliminary transmission electron microscopy study also supports these results. The as‐deposited films have zero resistance temperatures of 86–87 K, and critical current densities of 6×104 A/cm2 at 77 K and 1.2×105 A/cm2 at 73 K. Our results indicate that the superconducting properties of the films are limited primarily by the quality and degree of epitaxal growth of the buffer layers on the silicon substrate.

High critical currents in epitaxial YBa2Cu3O7−x thin films on silicon with buffer layers

Recently there has been increased demand for not only ultra-low power, but also high performance, even in standby-power-critical applications. Sensor nodes, for example, need a microcontroller unit (MCU) that has the ability to process signals and compress data immediately. A previously reported 130nm CMOS and FeRAM-based MCU features zero-standby power and fast wakeup operation by incorporating FeRAM devices into logic circuits [1]. The 8MHz speed, however, was not sufficiently high to meet application requirements, and the FeRAM process also has drawbacks: low compatibility with standard CMOS, and write endurance limitations. A spintronics-based nonvolatile integrated circuit is a promising option to achieve zero standby power and high-speed operation, along with compatibility with CMOS processes. In this work, we demonstrate a fully nonvolatile 16b MCU using 90nm standard CMOS and three-terminal SpinRAM technology. It achieves 20MHz, 145μW/MHz operation with a 1V supply in the active state, and 4.5μW intermittent operation with 120ns wakeup time and 0.1% active ratio, without forwarding of re-boot code from memory. The features provide sufficiently long battery life to achieve maintenance-free sensor nodes.

10.5 A 90nm 20MHz fully nonvolatile microcontroller for standby-power-critical applications

Since MRAM cells have unlimited write endurance, they can be used as substitutes for DRAMs or SRAMs. MRAMs in electronic appliances enhance their convenience and energy efficiency because data in MRAMs are nonvolatile and retained even in the power-off state. Therefore, 2 to 16Mb standalone MRAMs have been developed [1–4]. However, in terms of their random-access times, they are not enough fast (25ns) [1] as substitutes for all kinds of stand-alone DRAMs or SRAMs. To attain a standalone MRAM with both a fast random-access time and a large capacity, we adopt a cell structure with 2 transistors and 1 magnetic tunneling junction (2T1MTJ), which we previously published for a 1Mb embedded MRAM macro [5]. We need to develop circuit schemes to achieve a larger memory capacity and a higher cell-occupation ratio with small access-time degradation. We describe the circuit schemes of a 32Mb MRAM, which enable 63% cell occupation ratio and 12ns access time.

A 90nm 12ns 32Mb 2T1MTJ MRAM

MRAM includes a first wiring, a second wiring, and a memory cell. The first wiring extends to a first direction, and the second wiring extends to a second direction. The memory cell includes a free magnetic layer in which a plurality of magnetic layers coupled anti-ferromagnetically through non-magnetic layers are laminated, and is provided at an intersection of the first and second wirings. The magnetization direction of the free magnetic layer is different from the first and second directions. The writing method includes (a) reading a first data stored in the memory cell; (b) comparing a second data to be written to the memory cell and the first data; and (c) changing a direction of a first write current supplied to the first wiring and a direction of the second write current to be supplied to the second wiring, when the first data and second data are different.

Sadahiko Miura

Papers

Low-current perpendicular domain wall motion cell for scalable high-speed MRAM

High critical currents in epitaxial YBa2Cu3O7−x thin films on silicon with buffer layers

10.5 A 90nm 20MHz fully nonvolatile microcontroller for standby-power-critical applications

A 90nm 12ns 32Mb 2T1MTJ MRAM

Magnetic random access memory