S
Saeid Nooshabadi
Researcher at Michigan Technological University
Publications - 206
Citations - 1432
Saeid Nooshabadi is an academic researcher from Michigan Technological University. The author has contributed to research in topics: CMOS & Decoding methods. The author has an hindex of 19, co-authored 205 publications receiving 1353 citations. Previous affiliations of Saeid Nooshabadi include Hobart Corporation & Gwangju Institute of Science and Technology.
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Journal ArticleDOI
Modernization of teaching in embedded systems design-an international collaborative project
Saeid Nooshabadi,Jim Garside +1 more
TL;DR: This project, being the first of its kind anywhere in the world, provides a learning environment that replicates the current industrial practice in embedded systems design in an easy and comprehensible setting.
Proceedings ArticleDOI
FPGA implementation of a median filter
G.L. Bates,Saeid Nooshabadi +1 more
TL;DR: Three realizations of median filter are described, built into as few as one field programmable logic device, which is capable of processing an incoming video data stream at a maximum of around 30 MS/s.
Journal ArticleDOI
Analysis of High-Performance Fast Feedthrough Logic Families in CMOS
TL;DR: Experimental results demonstrate that low-power FTL provides for smaller propagation time delay, lower energy consumption, and similar combined delay, power consumption and active area product, while providing lower sensitivity to power supply, temperature, capacitive load and process variations than the standard CMOS technologies.
Journal ArticleDOI
Concurrency techniques for arithmetic coding in JPEG2000
TL;DR: This work examines the existing MQ arithmetic coder architectures and develops novel techniques capable of absorbing the high symbol rate from high performance bit-plane coders, as well as providing flexible design choices.
Proceedings ArticleDOI
Improved throughput arithmetic coder for JPEG2000
TL;DR: A new pipelined MQ coder is developed that can process exactly two symbols per clock cycle, and is compared with the "Hypothesis Testing" arithmetic coder and a reference one symbol per cycle coder.