Internet of vehicles (IoV) is a branch of the internet of things (IoT) which is used for communication among vehicles. As vehicular nodes are considered always in motion, hence it causes the frequent changes in the topology. These changes cause major issues in IoV like scalability, dynamic topology changes, and shortest path for routing. Clustering is among one of the solutions for such type of issues. In this paper, the stability of IoV topology in a dynamic environment is focused. The proposed metaheuristic dragonfly-based clustering algorithm CAVDO is used for cluster-based packet route optimization to make stable topology, and mobility aware dynamic transmission range algorithm (MA-DTR) is used with CAVDO for transmission range adaptation on the basis of traffic density. The proposed CAVDO with MA-DTR is compared with the progressive baseline techniques ant colony optimization (ACO) and comprehensive learning particle swarm optimization (CLPSO). Numerous experiments were performed keeping in view the transmission dynamics for stable topology. CAVDO performed better in many cases providing minimum number of clusters according to current channel condition. Considerable important parameters involved in clustering process are: number of un-clustered nodes as a re-clustering criterion, clustering time, re-clustering delay, dynamic transmission range, direction, and speed. According to these parameters, results indicate that CAVDO outperformed ACO-based clustering and CLPSO in various network settings. Additionally, to improve the network availability and to incorporate the functionalities of next-generation network infrastructure, 5G-enabled architecture is also utilized.

Clustering algorithm for internet of vehicles (IoV) based on dragonfly optimizer (CAVDO)

Genesis of the Cuonadong tin polymetallic deposit in the Tethyan Himalaya: Evidence from geology, geochronology, fluid inclusions and multiple isotopes

Scalability and the highly dynamic topology of Vehicular Ad Hoc Networks (VANETs) are the biggest challenges that slow the roll-out of such a promising technology. Adopting an effective VANET clustering algorithm can tackle these issues in addition to benefiting routing, security and media access management. In this paper, we propose a general-purpose resilient double-head clustering (DHC) algorithm for VANET. Our proposed approach is a mobility-based clustering algorithm that exploits the most relevant mobility metrics such as vehicle speed, position, and direction, in addition to other metrics related to the communication link quality such as the link expiration time (LET) and the signal-to-noise ratio (SNR). The proposed algorithm has enhanced performance and stability features, especially during the cluster maintenance phase, through a set of procedures developed to achieve these objectives. An extensive evaluation methodology is followed to validate DHC and compare its performance with another algorithm using different existing and newly proposed evaluation metrics. These metrics are analyzed under various mobility scenarios, vehicle densities, and radio channel models such as log-normal shadowing and two-ray ground loss with and without Nakagami-m fading model. The proposed algorithm DHC has proven its ability to be more stable and efficient under different simulation scenarios.

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Double-Head Clustering for Resilient VANETs

In this paper, the RF and DC characteristics of AlGaN/GaN High electron mobility transistor is analysed using discrete field plate technique. Surprisingly, it reduces the device parasitic capacitance exhibiting very low CGS and CGD of 5.8 × 10−13 F/mm and 4.2 × 10−13 F/mm respectively to improve the cut off frequency (fT) from 17.5 GHz to 20 GHz. The discrete field plate suppresses the maximum electric field between gate and drain region to achieve the high breakdown voltage of 330 V. The maximum transconductance (gm) achieved is 275 mS/mm, ensuring the better DC operation of the device. The simulated results clearly show that, the discrete field plate HEMTs are superior in performance over conventional GaN FP-HEMTs for future high frequency and high power applications.

Analysis of AlGaN/GaN HEMT using discrete field plate technique for high power and high frequency applications

Late Cretaceous magmatism and related metallogeny in the Tengchong area: Evidence from geochronological, isotopic and geochemical data from the Xiaolonghe Sn deposit, western Yunnan, China

We have demonstrated the impact of dual material gate (DMG) and triple material gate (TMG) on the performance of enhancement mode n++GaN/InAlN/AlN/GaN high electron mobility transistors (HEMTs) and a comparison is made with the performance of single material gate (SMG) enhancement mode n++GaN/InAlN/AlN/GaN high electron mobility transistors (HEMTs) by using two-dimensional Sentaurus TCAD device simulation. Thermodynamic transport model is used for simulating the proposed device. We have systematically investigated the advantage of DMG and TMG over SMG device. The key idea in this paper is to reveal the enhancement in drain current (I d ), transconductance, cut off frequency and RF current gain of DMG and TMG device over SMG normally off n++GaN/InAlN/AlN/GaN high electron mobility transistors. The result shows that the DMG and TMG enhancement mode n++GaN/InAlN/AlN/GaN high electron mobility transistors is potentially better candidate for future high speed, microwave and digital application.

Performance analysis of gate material engineering in enhancement mode n ++ GaN/InAlN/AlN/GaN HEMTs

In the present work, we have analyzed the influence of AlN spacer layer thickness (ts) on device performances of 120 nm gate length AlInN/AlN/GaN MOS-HEMT device, using 2D Sentaurus TCAD simulation. Hydrodynamic model with due consideration of interface traps is used for the simulations. Due to high value of two-dimensional electron gas (2DEG) density and mobility in AlInN/AlN/GaN MOS-HEMT device, very high drain current (0.004 A/a#x03BC;m) density is achieved. Simulation of major device performance parameters such as Tran conductance (gm), cutoff frequency (ft) and total gate capacitance (Cgg) have been done for ts ranging from 0.5 nm to 2 nm. We have also optimized the spacer layer thickness for obtaining the maximum device performance.

Effect of AlN Spacer Layer Thickness on Device Performance of AIInN/AlN/GaN MOSHEMT

In this Paper, we have studied and compared the performance of two different configurations of simulation model advanced MOSFET devices which can be used for biosensor application. The bio-molecules like protein, biotin, streptavidin, APTES, etc., undergo label free electrical detection with the help of dielectrical modulation technique in order to overcome the limitations of short channel effect in a more efficient way. The bio-molecules trapped inside the cavity region change the electrical parameters of the MOSFET. Biosensors based on MOSFETs have certain issues, like short channel effects (SCEs) and problems related to scaling and power supply. Therefore the proposed device is better withstand to SCEs and can be consider as an alternative for biosensing applications. For channel material, silicon is used for both the configurations i.e. with stack and without stack model and we have also studied the performance of the device based on the analog as well as RF parameters by considering the protein as bio-molecule in the cavity. Two different oxide materials are used to design the device structure such as HfO2 (K = 25) and SiO2 (K = 3.9) and for simulation purpose the 2D Sentrausu TCAD simulator has been used. The sensing capability of this proposed dielectric modulated device can be applicable for IOT based applications. They can also be uses in health IOT systems for medical research applications and as bio chip sensor in wearable device so as to study the protein content of the human body.

Comparison Study of DG-MOSFET with and without Gate Stack Configuration for Biosensor Applications

Analysis of flicker and thermal noise in p-channel Underlap DG FinFET

This work presents the effect of p-type GaN gate doping concentration on the DC performances of 60nm gate length of AlGaN/GaN Normally-off HFET using 2D Atlas TCAD simulation. An extensive simulation is carried out for the proposed device to explore the parameters such as drain current, transconductance, energy band diagram and surface potential with respect to p-type GaN gate doping concentration (P n ). The concentration is varied from 5×1017 to 1×1019 and it is verified that with increase in P n the drain current increases and transconductance decreases. An important conclusion has been figured out that when the P n falls below 1×1018, the HFET device lost its normally-off mode which is not desirable for the high power switching application. Hence proper optimization of P n is indispensable to preserve the normally-off mode operation and at the same time enhancing certain performance parameters.

Sanjit Kumar Swain

Papers

Performance analysis of gate material engineering in enhancement mode n ++ GaN/InAlN/AlN/GaN HEMTs

Effect of AlN Spacer Layer Thickness on Device Performance of AIInN/AlN/GaN MOSHEMT

Comparison Study of DG-MOSFET with and without Gate Stack Configuration for Biosensor Applications

Analysis of flicker and thermal noise in p-channel Underlap DG FinFET

Effect of doping in p-GaN gate on DC performances of AlGaN/GaN normally-off scaled HFETs