S
Seth H. Pugsley
Researcher at Intel
Publications - 26
Citations - 912
Seth H. Pugsley is an academic researcher from Intel. The author has contributed to research in topics: Cache & Instruction prefetch. The author has an hindex of 10, co-authored 25 publications receiving 719 citations. Previous affiliations of Seth H. Pugsley include Hewlett-Packard & University of Utah.
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Proceedings ArticleDOI
NDC: Analyzing the impact of 3D-stacked memory+logic devices on MapReduce workloads
Seth H. Pugsley,Jeffrey Jestes,Huihui Zhang,Rajeev Balasubramonian,Vijayalakshmi Srinivasan,Alper Buyuktosunoglu,Al Davis,Feifei Li +7 more
TL;DR: A number of key elements necessary in realizing efficient NDC operation are described and evaluated, including low-EPI cores, long daisy chains of memory devices, and the dynamic activation of cores and SerDes links.
Proceedings ArticleDOI
Efficiently prefetching complex address patterns
Manjunath Shevgoor,Sahil Koladiya,Rajeev Balasubramonian,Christopher B. Wilkerson,Seth H. Pugsley,Zeshan A. Chishti +5 more
TL;DR: The Variable Length Delta Prefetcher (VLDP), which builds up delta histories between successive Cache line misses within physical pages, and then uses these histories to predict the order of cache line misses in new pages.
Proceedings ArticleDOI
Sandbox Prefetching: Safe run-time evaluation of aggressive prefetchers
Seth H. Pugsley,Zeshan A. Chishti,Christopher B. Wilkerson,Peng-Fei Chuang,Robert L. Scott,Aamer Jaleel,Shih-Lien Lu,Kingsum Chow,Rajeev Balasubramonian +8 more
TL;DR: This work proposes a new mechanism to determine at run-time the appropriate prefetching mechanism for the currently executing program, called Sandbox Prefetching, which combines the ideas of global pattern confirmation and immediatePrefetching action to achieve high performance.
Proceedings ArticleDOI
Path confidence based lookahead prefetching
Jinchun Kim,Seth H. Pugsley,Paul V. Gratz,A. L. Narasimha Reddy,Christopher B. Wilkerson,Zeshan A. Chishti +5 more
TL;DR: The Signature Path Prefetcher (SPP), which offers effective solutions for three classic challenges in prefetcher design, uses a compressed history based scheme that accurately predicts complex address patterns and adaptively throttle itself on a per-prefetch stream basis.
Proceedings ArticleDOI
SWEL: hardware cache coherence protocols to map shared data onto shared caches
TL;DR: A novel coherence protocol is proposed that greatly reduces the number of coherence operations and falls back on a simple broadcast-based snooping protocol when infrequent coherence is required, based on the premise that most blocks are either private to a core or read-only, and hence, do not require coherence.