T
Tanay Karnik
Researcher at Intel
Publications - 218
Citations - 8862
Tanay Karnik is an academic researcher from Intel. The author has contributed to research in topics: Inductor & Signal. The author has an hindex of 42, co-authored 214 publications receiving 8558 citations.
Papers
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Proceedings ArticleDOI
Parameter variations and impact on circuits and microarchitecture
TL;DR: Process, voltage and temperature variations; and their impact on circuit and microarchitecture; and possible solutions to reduce the impact of parameter variations and to achieve higher frequency bins are presented.
Journal ArticleDOI
Area-efficient linear regulator with ultra-fast load regulation
TL;DR: In this article, the authors demonstrate a fully integrated linear regulator for multisupply voltage microprocessors implemented in a 90 nm CMOS technology, which enables a 90 mV/sub P-P/output droop with only a small on-chip decoupling capacitor of 0.6 nF.
Proceedings Article
Energy-Efficient and Metastability-Immune Resilient Circuits for Dynamic Variation Tolerance
Keith Bowman,James W. Tschanz,Nam Sung Kim,Janice C. Lee,Christopher B. Wilkerson,Shih-Lien Lu,Tanay Karnik,Vivek De +7 more
TL;DR: A 65 nm resilient circuit test-chip is implemented with timing-error detection and recovery circuits to eliminate the clock frequency guardband from dynamic supply voltage (VCC) and temperature variations as well as to exploit path-activation probabilities for maximizing throughput.
Journal ArticleDOI
Energy-Efficient and Metastability-Immune Resilient Circuits for Dynamic Variation Tolerance
Keith Bowman,James W. Tschanz,Nam Sung Kim,Janice C. Lee,Christopher B. Wilkerson,Shih-Lien Lu,Tanay Karnik,Vivek De +7 more
TL;DR: In this article, a 65 nm resilient circuit test-chip is implemented with timing-error detection and recovery circuits to eliminate the clock frequency guardband from dynamic supply voltage (VCC) and temperature variations as well as to exploit path activation probabilities for maximizing throughput.
Journal ArticleDOI
Review of On-Chip Inductor Structures With Magnetic Films
TL;DR: A comparison of on-chip inductors with magnetic materials from previous studies is presented and examined in this article, where the inductors use copper metallization and amorphous Co-Zr-Ta magnetic material.