1980 Preface * 1999 Preface * 1999 Acknowledgements * Introduction * 1 Circular Logic * 2 Phase Singularities (Screwy Results of Circular Logic) * 3 The Rules of the Ring * 4 Ring Populations * 5 Getting Off the Ring * 6 Attracting Cycles and Isochrons * 7 Measuring the Trajectories of a Circadian Clock * 8 Populations of Attractor Cycle Oscillators * 9 Excitable Kinetics and Excitable Media * 10 The Varieties of Phaseless Experience: In Which the Geometrical Orderliness of Rhythmic Organization Breaks Down in Diverse Ways * 11 The Firefly Machine 12 Energy Metabolism in Cells * 13 The Malonic Acid Reagent ('Sodium Geometrate') * 14 Electrical Rhythmicity and Excitability in Cell Membranes * 15 The Aggregation of Slime Mold Amoebae * 16 Numerical Organizing Centers * 17 Electrical Singular Filaments in the Heart Wall * 18 Pattern Formation in the Fungi * 19 Circadian Rhythms in General * 20 The Circadian Clocks of Insect Eclosion * 21 The Flower of Kalanchoe * 22 The Cell Mitotic Cycle * 23 The Female Cycle * References * Index of Names * Index of Subjects

https://www.cambridge.org/core/services/aop-cambridge-core/content/view/596B270197FE27DE5FABB598B6210622/S0025557200150892a.pdf/div-class-title-span-class-italic-the-geometry-of-biological-time-span-by-a-t-winfree-pp-544-dm68-corrected-second-printing-1990-isbn-3-540-52528-9-springer-div.pdf

The geometry of biological time , by A. T. Winfree. Pp 544. DM68. Corrected Second Printing 1990. ISBN 3-540-52528-9 (Springer)

Neuromorphic computing has come to refer to a variety of brain-inspired computers, devices, and models that contrast the pervasive von Neumann computer architecture This biologically inspired approach has created highly connected synthetic neurons and synapses that can be used to model neuroscience theories as well as solve challenging machine learning problems The promise of the technology is to create a brain-like ability to learn and adapt, but the technical challenges are significant, starting with an accurate neuroscience model of how the brain works, to finding materials and engineering breakthroughs to build devices to support these models, to creating a programming framework so the systems can learn, to creating applications with brain-like capabilities In this work, we provide a comprehensive survey of the research and motivations for neuromorphic computing over its history We begin with a 35-year review of the motivations and drivers of neuromorphic computing, then look at the major research areas of the field, which we define as neuro-inspired models, algorithms and learning approaches, hardware and devices, supporting systems, and finally applications We conclude with a broad discussion on the major research topics that need to be addressed in the coming years to see the promise of neuromorphic computing fulfilled The goals of this work are to provide an exhaustive review of the research conducted in neuromorphic computing since the inception of the term, and to motivate further work by illuminating gaps in the field where new research is needed

A Survey of Neuromorphic Computing and Neural Networks in Hardware.

In a world where resources are scarce and urban areas consume the vast majority of these resources, it is vital to make cities greener and more sustainable. Advanced systems to improve and automate processes within a city will play a leading role in smart cities. From smart design of buildings, which capture rain water for later use, to intelligent control systems, which can monitor infrastructures autonomously, the possible improvements enabled by sensing technologies are immense. Ubiquitous sensing poses numerous challenges, which are of a technological or social nature. This paper presents an overview of the state of the art with regards to sensing in smart cities. Topics include sensing applications in smart cities, sensing platforms and technical challenges associated with these technologies. In an effort to provide a holistic view of how sensing technologies play a role in smart cities, a range of applications and technical challenges associated with these applications are discussed. As some of these applications and technologies belong to different disciplines, the material presented in this paper attempts to bridge these to provide a broad overview, which can be of help to researchers and developers in understanding how advanced sensing can play a role in smart cities.

The Role of Advanced Sensing in Smart Cities

Figures of merit connecting processing capabilities with power dissipated (OpS/Watt, Joule/bit, etc.) are becoming dominant factors in choosing technologies for implementing the next generation of computing and communication network systems. Superconductivity is viewed as a technology capable of achieving higher energy efficiencies than other technologies. Static power dissipation of standard RSFQ logic, associated with dc bias resistors, is responsible for most of the circuit power dissipation. In this paper, we review and compare different superconductor digital technology approaches and logic families addressing this problem. We present a novel energy-efficient single flux quantum logic family, ERSFQ/eSFQ. We also discuss energy-efficient approaches for output data interface and overall cryosystem design.

/pdf/energy-efficient-single-flux-quantum-technology-144o6vu2zy.pdf

Energy-Efficient Single Flux Quantum Technology

This paper presents a low power boost converter for thermoelectric energy harvesting that demonstrates an efficiency that is 15% higher than the state-of-the-art for voltage conversion ratios above 20. This is achieved by utilizing a technique allowing synchronous rectification in the discontinuous conduction mode. A low-power method for input voltage monitoring is presented. The low input voltage requirements allow operation from a thermoelectric generator powered by body heat. The converter, fabricated in a 0.13 μm CMOS process, operates from input voltages ranging from 20 mV to 250 mV while supplying a regulated 1 V output. The converter consumes 1.6 (1.1) μW of quiescent power, delivers up to 25 (175) μW of output power, and is 46 (75)% efficient for a 20 mV and 100 mV input, respectively.

A 20 mV Input Boost Converter With Efficient Digital Control for Thermoelectric Energy Harvesting

A low-power CMOS voltage reference was developed using a 0.35 mum standard CMOS process technology. The device consists of MOSFET circuits operated in the subthreshold region and uses no resistors. It generates two voltages having opposite temperature coefficients and adds them to produce an output voltage with a near-zero temperature coefficient. The resulting voltage is equal to the extrapolated threshold voltage of a MOSFET at absolute zero temperature, which was about 745 mV for the MOSFETs we used. The temperature coefficient of the voltage was 7 ppm/degC at best and 15 ppm/degC on average, in a range from - 20 to 80degC. The line sensitivity was 20 ppm/V in a supply voltage range of 1.4-3 V, and the power supply rejection ratio (PSRR) was -45 dB at 100 Hz. The power dissipation was 0.3 muW at 80degC. The chip area was 0.05 mm2 . Our device would be suitable for use in subthreshold-operated, power-aware LSIs.

/pdf/a-300-nw-15-ppm-circ-c-20-ppm-v-cmos-voltage-reference-5c6xnvq0l1.pdf

A 300 nW, 15 ppm/ $^{\circ}$ C, 20 ppm/V CMOS Voltage Reference Circuit Consisting of Subthreshold MOSFETs

This paper presents bandgap reference (BGR) and sub-BGR circuits for nanowatt LSIs. The circuits consist of a nano-ampere current reference circuit, a bipolar transistor, and proportional-to-absolute-temperature (PTAT) voltage generators. The proposed circuits avoid the use of resistors and contain only MOSFETs and one bipolar transistor. Because the sub-BGR circuit divides the output voltage of the bipolar transistor without resistors, it can operate at a sub-1-V supply. The experimental results obtained in the 0.18-μm CMOS process demonstrated that the BGR circuit could generate a reference voltage of 1.09 V and the sub-BGR circuit could generate one of 0.548 V. The power dissipations of the BGR and sub-BGR circuits corresponded to 100 and 52.5 nW.

1.2-V Supply, 100-nW, 1.09-V Bandgap and 0.7-V Supply, 52.5-nW, 0.55-V Subbandgap Reference Circuits for Nanowatt CMOS LSIs

This paper presents a level shifter circuit capable of handling extremely low-voltage inputs. The circuit has a distinctive current generation scheme using a logic error correction circuit that works by detecting the input and output logic levels. The proposed level shifter circuit can convert low-voltage digital input signals into high-voltage digital output signals. The circuit achieves low-power operation because it dissipates operating current only when the input signal changes. Measurement results demonstrated that the circuit can convert a 0.23-V input signal into a 3-V output signal. The power dissipation was 58 nW for a 0.4-V 10-kHz input pulse.

A Low-Power Level Shifter With Logic Error Correction for Extremely Low-Voltage Digital CMOS LSIs

We have developed a nano-ampere CMOS current reference circuit that is tolerant to threshold voltage variations. This paper describes the circuit and its temperature dependence control technique for ultra-low power LSIs. Because the generated current increases with temperature, we propose a temperature dependence control architecture for a reference current by using the different temperature characteristics of “electron” and “hole” mobilities. Experiment results demonstrated that the circuit can generate a temperature compensated reference current of 9.95 nA and that the temperature dependence of the output reference current can be controlled by using the different temperature dependences of electron and hole mobilities. The temperature dependence controllability was 8.57 pA/˚C·bit and its total current dissipation was 68.1 nA.

A nano-ampere current reference circuit and its temperature dependence control by using temperature characteristics of carrier mobilities

This paper proposes a fully-integrated high-conversion-ratio dual-output voltage boost converter (VBC) with maximum power point tracking (MPPT) circuits for low-voltage energy harvesting. The VBC consists of two voltage generators that generate $V_{\mathrm { OUT1}}$ and $V_{\mathrm { OUT2}}$ . $V_{\mathrm { OUT1}}$ and $V_{\mathrm { OUT2}}$ are three and nine times higher than the harvester’s output $V_{\mathrm { IN}}$ , respectively. $V_{\mathrm { OUT1}}$ is used as a supply voltage for on-chip application circuits while $V_{\mathrm { OUT2}}$ is used as the charging voltage for a Li-ion secondary battery. The VBC achieves a high voltage conversion ratio (max. $\times \,\,9$ ) and a high power conversion efficiency. The MPPT circuits control the operating frequencies of the CPs to extract maximum power at each output. The measurement results demonstrated that the circuit converted a 0.59 V input to a 1.41 V output with 75.8% efficiency when the output powers of $V_{\mathrm { OUT1}}$ and $V_{\mathrm { OUT2}}$ were 396 and $0~\mu \text {W}$ , respectively, and a 0.62 V input to a 4.54 V output with 49.1% efficiency when the output powers were 0 and $114~\mu \text {W}$ , respectively.

Tetsuya Hirose

Papers

A 300 nW, 15 ppm/ $^{\circ}$ C, 20 ppm/V CMOS Voltage Reference Circuit Consisting of Subthreshold MOSFETs

1.2-V Supply, 100-nW, 1.09-V Bandgap and 0.7-V Supply, 52.5-nW, 0.55-V Subbandgap Reference Circuits for Nanowatt CMOS LSIs

A Low-Power Level Shifter With Logic Error Correction for Extremely Low-Voltage Digital CMOS LSIs

A nano-ampere current reference circuit and its temperature dependence control by using temperature characteristics of carrier mobilities

Fully-Integrated High-Conversion-Ratio Dual-Output Voltage Boost Converter With MPPT for Low-Voltage Energy Harvesting