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Thibault Kempf

Researcher at STMicroelectronics

Publications -  7
Citations -  10

Thibault Kempf is an academic researcher from STMicroelectronics. The author has contributed to research in topics: Chip & Flash memory. The author has an hindex of 1, co-authored 6 publications receiving 4 citations. Previous affiliations of Thibault Kempf include University of Nice Sophia Antipolis & Aix-Marseille University.

Papers
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Journal ArticleDOI

Quantitative correlation between Flash and equivalent transistor for endurance electrical parameters extraction

TL;DR: The final goal is to be able to split the physical effects of repetitive hot carrier and Fowler-Nordheim operations, typical of Flash memories, to extract the electrical parameters evolution on a simple equivalent transistor.
Proceedings ArticleDOI

Threshold voltage bitmap analysis methodology: Application to a 512kB 40nm Flash memory test chip

TL;DR: This paper presents a methodology of bitmap analysis to extract and follow the intrinsic and extrinsic parameters of a 40nm eFlash technology during ramp-up and yields more information about intrinsic cell technology weaknesses and the best way to tackle them when integrated at product level.
Proceedings ArticleDOI

Hot Electron Source Side Injection Comprehension in 40nm eSTM

TL;DR: In this article, an experimental study of the hot electron Source Side Injection programming operation of the embedded Select in Trench Memory (eSTM) cell was carried out, where a complete set of electrical characterizations is carried out.
Proceedings ArticleDOI

Impact of CMOS post nitridation annealing on reliability of 40nm 512kB embedded Flash array

TL;DR: In this paper, the impact of post-nitridation annealing (PNA) temperature on a 40nm embedded Flash reliability is studied. But the performance of the Flash tunnel oxide is not analyzed.
Proceedings ArticleDOI

Study of HTO-based alternative gate oxides for high voltage transistors on advanced eNVM technology

TL;DR: In this article, high temperature oxide (HTO) is evaluated on a 40nm automotive eFlash process as replacement of furnace grown thick gate oxide for high voltage transistors, and different thermal treatments are evaluated to enhance HTO quality, including growth of interfacial layer, reoxidation and high temperature annealings.