The recent progress in ferroelectricity and antiferroelectricity in HfO2-based thin films is reported. Most ferroelectric thin film research focuses on perovskite structure materials, such as Pb(Zr,Ti)O3, BaTiO3, and SrBi2Ta2O9, which are considered to be feasible candidate materials for non-volatile semiconductor memory devices. However, these conventional ferroelectrics suffer from various problems including poor Si-compatibility, environmental issues related to Pb, large physical thickness, low resistance to hydrogen, and small bandgap. In 2011, ferroelectricity in Si-doped HfO2 thin films was first reported. Various dopants, such as Si, Zr, Al, Y, Gd, Sr, and La can induce ferro-electricity or antiferroelectricity in thin HfO2 films. They have large remanent polarization of up to 45 μC cm(-2), and their coercive field (≈1-2 MV cm(-1)) is larger than conventional ferroelectric films by approximately one order of magnitude. Furthermore, they can be extremely thin ( 5 eV). These differences are believed to overcome the barriers of conventional ferroelectrics in memory applications, including ferroelectric field-effect-transistors and three-dimensional capacitors. Moreover, the coupling of electric and thermal properties of the antiferroelectric thin films is expected to be useful for various applications, including energy harvesting/storage, solid-state-cooling, and infrared sensors.

Ferroelectricity and Antiferroelectricity of Doped Thin HfO2‐Based Films

Novel hafnium oxide (HfO2)-based ferroelectrics reveal full scalability and complementary metal oxide semiconductor integratability compared to perovskite-based ferroelectrics that are currently used in nonvolatile ferroelectric random access memories (FeRAMs). Within the lifetime of the device, two main regimes of wake-up and fatigue can be identified. Up to now, the mechanisms behind these two device stages have not been revealed. Thus, the main scope of this study is an identification of the root cause for the increase of the remnant polarization during the wake-up phase and subsequent polarization degradation with further cycling. Combining the comprehensive ferroelectric switching current experiments, Preisach density analysis, and transmission electron microscopy (TEM) study with compact and Technology Computer Aided Design (TCAD) modeling, it has been found out that during the wake-up of the device no new defects are generated but the existing defects redistribute within the device. Furthermore, vacancy diffusion has been identified as the main cause for the phase transformation and consequent increase of the remnant polarization. Utilizing trap density spectroscopy for examining defect evolution with cycling of the device together with modeling of the degradation results in an understanding of the main mechanisms behind the evolution of the ferroelectric response.

Physical Mechanisms behind the Field-Cycling Behavior of HfO2-Based Ferroelectric Capacitors

The ferroelectricity in fluorite-structure oxides such as hafnia and zirconia has attracted increasing interest since 2011 They have various advantages such as Si-based complementary metal oxide semiconductor-compatibility, matured deposition techniques, a low dielectric constant and the resulting decreased depolarization field, and stronger resistance to hydrogen annealing However, the wake-up effect, imprint, and insufficient endurance are remaining reliability issues Therefore, this paper reviews two major aspects: the advantages of fluorite-structure ferroelectrics for memory applications are reviewed from a material’s point of view, and the critical issues of wake-up effect and insufficient endurance are examined, and potential solutions are subsequently discussed

https://www.cambridge.org/core/services/aop-cambridge-core/content/view/3DB31D1931EA9955AF5E300BC33891D6/S2159685918001751a.pdf/div-class-title-review-and-perspective-on-ferroelectric-hfo-span-class-sub-2-span-based-thin-films-for-memory-applications-div.pdf

Review and perspective on ferroelectric HfO2-based thin films for memory applications

Bound to complex perovskite systems, ferroelectric random access memory (FRAM) suffers from limited CMOS-compatibility and faces severe scaling issues in today's and future technology nodes. Nevertheless, compared to its current-driven non-volatile memory contenders, the field-driven FRAM excels in terms of low voltage operation and power consumption and therewith has managed to claim embedded as well as stand-alone niche markets. However, in order to overcome this restricted field of application, a material innovation is needed. With the ability to engineer ferroelectricity in HfO2, a high-k dielectric well established in memory and logic devices, a new material choice for improved manufacturability and scalability of future 1T and 1T-1C ferroelectric memories has emerged. This paper reviews the recent progress in this emerging field and critically assesses its current and future potential. Suitable memory concepts as well as new applications will be proposed accordingly. Moreover, an empirical description of the ferroelectric stabilization in HfO2 will be given, from which additional dopants as well as alternative stabilization mechanism for this phenomenon can be derived.

https://iopscience.iop.org/article/10.1149/2.0081505jss/pdf

Ferroelectric Hafnium Oxide Based Materials and Devices: Assessment of Current Status and Future Prospects

This expanded and thoroughly revised edition of Thomas H. Lee's acclaimed guide to the design of gigahertz RF integrated circuits features a completely new chapter on the principles of wireless systems. The chapters on low-noise amplifiers, oscillators and phase noise have been significantly expanded as well. The chapter on architectures now contains several examples of complete chip designs that bring together all the various theoretical and practical elements involved in producing a prototype chip. First Edition Hb (1998): 0-521-63061-4 First Edition Pb (1998); 0-521-63922-0

The Design of CMOS Radio-Frequency Integrated Circuits: RF CIRCUITS THROUGH THE AGES

Ferroelectric Si:HfO2 has been investigated starting from metal-ferroelectric-metal (MFM) capacitors over metal-ferroelectric-insulator-semiconductor (MFIS) and finally ferroelectric field-effect-transistor (FeFET) devices. Endurance characteristics and field cycling effects recognized for the material itself are shown to also translate to highly scaled 30-nm FeFET devices. Positive-up negative-down as well as pulsed Id-Vg measurements illustrate how ferroelectric material characteristics of MFM capacitors can also be identified in more complex MFIS and FeFET structures. Antiferroelectric-like characteristics observed for relatively high Si dopant concentration reveal significant trapping superimposed onto the ferroelectric memory window limiting the general program/erase endurance of the devices to 104 cycles. In addition, worst case disturb scenarios for a VDD/2 and VDD/3 scheme are evaluated to prove the viability of one-transistor memory cell concepts. The ability to tailor the ferroelectric properties by appropriate dopant concentration reveals disturb resilience up to 106 disturb cycles while maintaining an ION to IOFF ratio of more than four orders of magnitude.

From MFM Capacitors Toward Ferroelectric Transistors: Endurance and Disturb Characteristics of ${\rm HfO}_{2}$ -Based FeFET Devices

Strain greatly affects the electrical properties of silicon because strain changes the energy band structure of silicon. In MOSFET devices, the terminal voltages induce electrical fields, which themselves modulate the electronic band structure and interact with strain-induced changes. Applied electrical fields are used to experimentally study different state-of-the-art local and global strain techniques and reveal the different responses of n- and p-MOSFETs to the different strain techniques. It is shown that p-MOSFETs have more low-lateral-field linear drive-current enhancement and less high-lateral-field saturation drive-current enhancement at both low and high vertical fields. The situation is similar for n-MOSFETs at low vertical fields. However, at high vertical fields, n-MOSFET low-lateral-field linear drive-current enhancement is less than the high-lateral-field saturation drive-current enhancement. The origin for this behavior can be found in the different strain effects on the electronic band structure, which results in effective mass reduction and/or scattering suppression. These, in turn, contribute differently to linear and saturation drive-current enhancements in n- and p-MOSFETs.

Understanding Strain-Induced Drive-Current Enhancement in Strained-Silicon n-MOSFET and p-MOSFET

Methods for forming integrated circuits and integrated circuits are disclosed. The integrated circuits comprise gate structures overlying and transverse to one or more fins that are delineated by trenches formed in a semiconductor substrate. Protruding portions are formed in the trenches in between the gate electrode structure on exposed sidewall surfaces of the one or more fins. The trenches are filled with an insulating material between the protruding portions and the gate structures.

Integrated circuits having protruding source and drain regions and methods for forming integrated circuits

The film thickness dependence of ferroelectric Si:HfO2 (10 nm and 30 nm) was studied with a focus on ferroelectric field effect transistor (FeFET) memory applications based on a 28 nm bulk technology. Experimental P-E hysteresis of metal-ferroelectric-metal capacitor structures could be reproduced by a Preisach-based ferroelectric simulation model implemented in a commercially available TCAD environment. The experimentally observed thickness dependence of material characteristics was then used for demonstrating memory window widening, reduced interfacial field stress and decreased depolarization fields by FeFET TCAD modeling. Based on these findings, improved memory characteristics (memory window size, endurance, retention) can be anticipated for FeFET devices possessing the appropriate Si:HfO2 thickness.

Performance investigation and optimization of Si:HfO 2 FeFETs on a 28 nm bulk technology

In a three-dimensional transistor configuration, a strain-inducing isolation material is provided, at least in the drain and source areas, thereby inducing a strain, in particular at and in the vicinity of the PN junctions of the three-dimensional transistor. In this case, superior transistor performance may be achieved, while in some illustrative embodiments even the same type of internally stressed isolation material may result in superior transistor performance of P-channel transistors and N-channel transistors.

Tom Herrmann

Papers

From MFM Capacitors Toward Ferroelectric Transistors: Endurance and Disturb Characteristics of ${\rm HfO}_{2}$ -Based FeFET Devices

Understanding Strain-Induced Drive-Current Enhancement in Strained-Silicon n-MOSFET and p-MOSFET

Integrated circuits having protruding source and drain regions and methods for forming integrated circuits

Performance investigation and optimization of Si:HfO 2 FeFETs on a 28 nm bulk technology

Strain Engineering in Three-Dimensional Transistors Based on Strained Isolation Material