Many metal–insulator–metal systems show electrically induced resistive switching effects and have therefore been proposed as the basis for future non-volatile memories. They combine the advantages of Flash and DRAM (dynamic random access memories) while avoiding their drawbacks, and they might be highly scalable. Here we propose a coarse-grained classification into primarily thermal, electrical or ion-migration-induced switching mechanisms. The ion-migration effects are coupled to redox processes which cause the change in resistance. They are subdivided into cation-migration cells, based on the electrochemical growth and dissolution of metallic filaments, and anion-migration cells, typically realized with transition metal oxides as the insulator, in which electronically conducting paths of sub-oxides are formed and removed by local redox processes. From this insight, we take a brief look into molecular switching systems. Finally, we discuss chip architecture and scaling issues.

http://chialvo.org/Curso/UBACurso/DIA7/Papers/Aono_NatMat_07_Ionic%20Switching%20Memory.pdf

Nanoionics-based resistive switching memories

Redox‐Based Resistive Switching Memories – Nanoionic Mechanisms, Prospects, and Challenges

Bose-Einstein condensation (BEC) has been observed in a dilute gas of sodium atoms. A Bose-Einstein condensate consists of a macroscopic population of the ground state of the system, and is a coherent state of matter. In an ideal gas, this phase transition is purely quantum-statistical. The study of BEC in weakly interacting systems which can be controlled and observed with precision holds the promise of revealing new macroscopic quantum phenomena that can be understood from first principles.

Bose-Einstein condensation in a gas of sodium atoms

Memristive devices are electrical resistance switches that can retain a state of internal resistance based on the history of applied voltage and current. These devices can store and process information, and offer several key performance characteristics that exceed conventional integrated circuit technology. An important class of memristive devices are two-terminal resistance switches based on ionic motion, which are built from a simple conductor/insulator/conductor thin-film stack. These devices were originally conceived in the late 1960s and recent progress has led to fast, low-energy, high-endurance devices that can be scaled down to less than 10 nm and stacked in three dimensions. However, the underlying device mechanisms remain unclear, which is a significant barrier to their widespread application. Here, we review recent progress in the development and understanding of memristive devices. We also examine the performance requirements for computing with memristive devices and detail how the outstanding challenges could be met.

Memristive devices for computing

Despite much progress in semiconductor integrated circuit technology, the extreme complexity of the human cerebral cortex, with its approximately 10(14) synapses, makes the hardware implementation of neuromorphic networks with a comparable number of devices exceptionally challenging. To provide comparable complexity while operating much faster and with manageable power dissipation, networks based on circuits combining complementary metal-oxide-semiconductors (CMOSs) and adjustable two-terminal resistive devices (memristors) have been developed. In such circuits, the usual CMOS stack is augmented with one or several crossbar layers, with memristors at each crosspoint. There have recently been notable improvements in the fabrication of such memristive crossbars and their integration with CMOS circuits, including first demonstrations of their vertical integration. Separately, discrete memristors have been used as artificial synapses in neuromorphic networks. Very recently, such experiments have been extended to crossbar arrays of phase-change memristive devices. The adjustment of such devices, however, requires an additional transistor at each crosspoint, and hence these devices are much harder to scale than metal-oxide memristors, whose nonlinear current-voltage curves enable transistor-free operation. Here we report the experimental implementation of transistor-free metal-oxide memristor crossbars, with device variability sufficiently low to allow operation of integrated neural networks, in a simple network: a single-layer perceptron (an algorithm for linear classification). The network can be taught in situ using a coarse-grain variety of the delta rule algorithm to perform the perfect classification of 3 × 3-pixel black/white images into three classes (representing letters). This demonstration is an important step towards much larger and more complex memristive neuromorphic networks.

Training and operation of an integrated neuromorphic network based on metal-oxide memristors

We have investigated the charge transport through superconducting single-electron transistors. With a sample which has large charging energy E c> Δ, where Δ is a superconducting energy gap of the electrodes, we studied the positions of the so-called Josephson-quasiparticle (JQP) peaks. We demonstrate that the JQP cycles coexist with the normal quasiparticle current even at the bias voltages above the Coulomb blockade threshold. Bias voltage conditions for observing these peaks are also classified for various parameter regions.

https://iopscience.iop.org/article/10.1143/JJAP.34.4562/pdf

Study of Josephson-Quasiparticle Cycles in Superconducting Single-Electron Transistors.

A switching element comprises an ion conductor for conducting metal ions used in electrochemical reaction, a first electrode and a second electrode provided apart from each other by a specified distance while in contact with the ion conductor, and a third electrode provided in contact with the ion conductor. When a voltage causing transition to ON state is applied to the third electrode, a metal is deposited by metal ions between the first electrode and the second electrode, thereby electrically connecting the first and the second electrode. When a voltage causing transition to OFF state is applied to the third electrode, the deposited metal is dissolved, thereby electrically disconnecting the first electrode and the second electrode.

Switching element, switching element driving method, rewritable logic integrated circuit and memory element

A novel polymer solid-electrolyte (PSE) switch, NanoBridge, featuring forming-free programming and an extremely high OFF/ON resistance ratio of 105 has been embedded in a 90nm-node CMOS by a fully logic-compatible process. Fast programming of 10nsec is also achieved in a 50nmφ 1k-bit-cell array by introducing the PSE, enabling a short and parallel programming. The OFF-state T 50 lifetime at 125°C is extrapolated to be more than 10 years. The developed switch is a strong candidate for realizing a low-power and low-cost nonvolatile programmable logic (NPL).

Polymer solid-electrolyte (PSE) switch embedded in 90nm CMOS with forming-free and 10nsec programming for low power, nonvolatile programmable logic (NPL)

The present invention addresses the problem of inhibiting the evolution of a poisoning gas to eliminate wiring-pattern resolution failures and thereby forming a desired wiring layer structure to provide functional elements having an improved property yield. This method for forming multi-layered copper interconnect on a semiconductor substrate comprises: forming a multilayer resist structure to form a given resist pattern on a substrate including an interlayer dielectric film that has via holes which have been formed in part thereof and filled with an SOC layer, the multilayer resist structure comprising an SOC layer, an SOG layer, an SiO 2 layer, and a chemical amplification type resist superposed in this order from the substrate side; conducting etching using the resist pattern as a mask to form a pattern for a wiring layer and via plugs; and forming the wiring layer and the via plugs in the pattern.

Method for forming wiring

Low-temperature characterization has been performed on atom switch to clarify conducting mechanism determining the device performance. The low resistive state (&#60;400Ω) shows metallic conduction accompanied with a high residual resistance. In the high resistive state (>108Ω), the resistance exponentially decreases with temperature based on Poole-Frenkel (P-F) conduction. In the intermediate range (105∼107Ω), the resistance has small temperature dependence and the current is suppressed at the low-voltage regime due to the charging effect at Cu residues in a solid-electrolyte. The polymer solid-electrolyte (PSE) with forming-free operation enables the complete collection of the Cu residues without destroying the electrolyte, which is essential for the atom switch to keep a high OFF/ON resistance ratio.

Toshitsugu Sakamoto

Papers

Study of Josephson-Quasiparticle Cycles in Superconducting Single-Electron Transistors.

Switching element, switching element driving method, rewritable logic integrated circuit and memory element

Polymer solid-electrolyte (PSE) switch embedded in 90nm CMOS with forming-free and 10nsec programming for low power, nonvolatile programmable logic (NPL)

Method for forming wiring

Conducting mechanism of atom switch with polymer solid-electrolyte