Learn the basic properties and designs of modern VLSI devices, as well as the factors affecting performance, with this thoroughly updated second edition. The first edition has been widely adopted as a standard textbook in microelectronics in many major US universities and worldwide. The internationally-renowned authors highlight the intricate interdependencies and subtle tradeoffs between various practically important device parameters, and also provide an in-depth discussion of device scaling and scaling limits of CMOS and bipolar devices. Equations and parameters provided are checked continuously against the reality of silicon data, making the book equally useful in practical transistor design and in the classroom. Every chapter has been updated to include the latest developments, such as MOSFET scale length theory, high-field transport model, and SiGe-base bipolar devices.

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Fundamentals of Modern VLSI Devices

Implanted B and P dopants in Si exhibit transient enhanced diffusion (TED) during annealing which arises from the excess interstitials generated by the implant. In order to study the mechanisms of TED, transmission electron microscopy measurements of implantation damage were combined with B diffusion experiments using doping marker structures grown by molecular-beam epitaxy (MBE). Damage from nonamorphizing Si implants at doses ranging from 5×1012 to 1×1014/cm2 evolves into a distribution of {311} interstitial agglomerates during the initial annealing stages at 670–815 °C. The excess interstitial concentration contained in these defects roughly equals the implanted ion dose, an observation that is corroborated by atomistic Monte Carlo simulations of implantation and annealing processes. The injection of interstitials from the damage region involves the dissolution of {311} defects during Ostwald ripening with an activation energy of 3.8±0.2 eV. The excess interstitials drive substitutional B into electric...

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Physical mechanisms of transient enhanced dopant diffusion in ion-implanted silicon

The silicon-germanium heterojunction bipolar transistor (SiGe HBT) is the first practical bandgap-engineered device to be realized in silicon. SiGe HBT technology combines transistor performance competitive with III-V technologies with the processing maturity, integration levels, yield, and hence, cost commonly associated with conventional Si fabrication. In the ten-and-one-half years since the first demonstration of a functional transistor, SiGe HBT technology has emerged from the research laboratory, entered manufacturing on 200-mm wafers, and is poised to enter the commercial RF and microwave market. State-of-the-art SiGe HBT's can deliver: (1) f/sub T/ in excess of 50 GHz; (2) f/sub max/ in excess of 70 GHz; (3) minimum noise figure below 0.7 dB at 2.0 GHz; (4) 1/f noise corner frequencies below 500 Hz; (5) cryogenic operation; (6) excellent radiation hardness; (7) competitive power amplifiers; and (8) reliability comparable to Si. A host of record-setting digital, analog, RF, and microwave circuits have been demonstrated in the past several years using SiGe HBT's, and recent work on passives and transmission lines on Si suggest a migratory path to Si-based monolithic microwave integrated circuits (MMIC's) is possible. The combination of SiGe HBT's with advanced Si CMOS to form an SiGe BiCMOS technology represents a unique opportunity for Si-based RF system-on-a-chip solutions. This paper reviews state-of-the-art SiGe HBT technology and assesses its potential for current and future RF and microwave systems.

SiGe HBT technology: a new contender for Si-based RF and microwave circuit applications

A review is given on the formation mechanisms and the properties of Si/Ge nanostructures that have been synthesized by self-assembling and self-ordering during heteroepitaxy of \mbox{silicon-germanium} alloys on single-crystal silicon substrates. The properties of electronic subbands in smooth strained Si/SiGe quantum well structures are presented as a basis for characterizing coherent Si/Ge nanostructures with free motion of carriers in a reduced number of dimensions. The low-dimensional band structure of valence band states confined in strained Si/Ge and Si/SiGe nanostructures is analysed by optical and electrical spectroscopy. The nanostructures presented were fabricated by self-assembly induced by elastic strain relaxation without applying any patterning technique. Misfit lattice strain of SiGe material deposited on Si substrates can relax by bunching of atomic surface steps with SiGe agglomeration at the step edges or by nucleation of Ge-rich islands in the Stranski-Krastanow growth mode. The size, density and composition of such Si/Ge nanostructures representing quantum wires and dots, respectively, can be tuned in a wide range by the growth parameters. Local strain fields extending into the Si host influence the nucleation and the lateral arrangement of nanostructures in subsequent layers and can be applied for self-ordering of nanostructures in the vertical as well as the lateral direction. Interband and intra-valence-band photocurrent, absorption and photoluminescence spectroscopy as well as C-V and admittance measurements reveal a consistent view of the band structure in Si/Ge quantum dot structures. This is in good agreement with model calculations based on band offsets, deformation potentials and effective electron masses known from earlier studies of Si/SiGe quantum well structures. The effective valence band offsets of hole states within Si/Ge nanostructures reach about 400?meV. Typical quantization energies of about 40?meV due to lateral confinement and Coulomb charging energies up to about 15?meV were observed for holes confined in 20?nm sized Si/Ge dots. Future applications of Si/Ge nanostructures such as photodetectors with improved performance or novel functionality are discussed.

https://iopscience.iop.org/article/10.1088/0034-4885/65/1/202/pdf

Si/Ge nanostructures

Semiconductor structures and devices including strained material layers having impurity-free zones, and methods for fabricating same. Certain regions of the strained material layers are kept free of impurities that can interdiffuse from adjacent portions of the semiconductor. When impurities are present in certain regions of the strained material layers, there is degradation in device performance. By employing semiconductor structures and devices (e.g., field effect transistors or “FETs”) that have the features described, or are fabricated in accordance with the steps described, device operation is enhanced.

Semiconductor structures employing strained material layers with defined impurity gradients and methods for fabricating same

Experiments on Si-rich SiGe layers show an exponential increase in Ge diffusion and an exponential decrease in B diffusion as a function of compressive strain, indicating a linear dependence of activation energy on strain. The effect arises from the structural relaxation of the lattice around the defect mediating diffusion (inward for a vacancy, outward for an interstitial). We infer the mechanisms of Ge and B diffusion in strain-free and compressively strained Si(Ge) at T1030 \ifmmode^\circ\else\textdegree\fi{}C, and draw some general conclusions on strain-modified diffusion in crystalline solids.

Diffusion in strained Si(Ge).

In an effort to determine the low‐temperature limit for the growth of Si and Si1−xGex epitaxial layers in an atmospheric‐pressure chemical vapor deposition (CVD) reactor, good quality material has been obtained at temperatures down to 600 °C, using SiH2Cl2 and GeH4 in H2 ambient. Si/Si1−xGex/Si heteroepitaxial structures are of good crystalline quality as well, showing abrupt interfaces. The Si‐growth rate enhancement, caused by the addition of GeH4 to the gas flow at low temperatures, turns into growth‐rate inhibition at higher temperatures. In this experiment oxygen and water partial pressures are several orders of magnitude higher than in ultrahigh vacuum CVD, without causing noticeable negative effects.

Low-temperature chemical vapor deposition of epitaxial Si and SiGe layers at atmospheric pressure

Advanced epitaxial growth of strained SiGe into a Si substrate enhances the freedom for designing high speed bipolar transistors. Devices can be designed by altering the Ge percentage, a procedure known as bandgap engineering. An optimization study on n-p-n SiGe-base bipolar transistors has been performed using computer simulations focusing on the effect of the Ge profile on the electrical characteristics. In this study it is shown that the base Gummel number is of major importance on the maximum cutoff frequency and the Ge-grading itself, which induces a quasielectric field, is of minor importance. Because of the outdiffusion of the boron dopant in the base and the relatively thin critical layer thickness of approximately 600 /spl Aring/, it appears that a box-like Ge profile with the leading edge approximately in the middle of the base is optimal. The predicted maximum cutoff frequency is 45 GHz, a sheet resistance of 8.5 k/spl Omega///spl square/ and current gain of 80. The optimized device was fabricated and measurements were performed showing good agreement with the simulations.

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On the optimization of SiGe-base bipolar transistors

P. Deixler, A. Rodriguez, W. De Boer, H. Sun, R Colclaser, D. Bower, N. Bell, A. Yao’, RBrock’, Y. Bouttement.’, G.A.M. Hurkx4>, L.F. TiemeijeS, J.C.J. Paassehens4”, H.G.A Huizing”,D.M.H. Hartskeer14, P. Agamal’, P.H.C Magnee’, E. Aksen’ and J.W. Slotboom6 Philips Semiconductors, 2070 Route 52, P.O. Box 1279, Hopewell Junction, NY 12533, USA ’Philips RF Device Modeling Group, San Jose, USA; ’ Philips RF Modeling Group, Caen, France ‘ Philips Natlab, Eindboven, The Netherlands; ’ Philips Research Leuven, Leuven, Belgium; ‘Univ. Delft, Netherlands Email: Peter.Deixler@philips.com, Phone: ++1 845 902 1586 Abstract QUBiC4X is a cost-effective ultra-high-speed SiGe:C RF-BiCMOS technology for emerging microwave applications with NPN fr/f,, up to l30/140GHz, enhanced RF-oriented 2.5V CMOS, SiGe:C Power Amplifiers with 88% power-added efficiency, distinguished substrate isolation, full suite of elite high-density passives, 5 metal layers and an advanced design flow.

http://ieeexplore.ieee.org/iel5/9427/29913/01365788.pdf

QUBiC4X: An f/sub T//f/sub max/ = 130/140GHz SiGe:C-BiCMOS manufacturing technology witg elite passives for emerging microwave applications

A silicon photodiode detector is presented for use in scanning electron microscopy (SEM). Enhanced imaging capabilities are achieved for sub-keV electron energy values by employing a pure boron (PureB) layer photodiode technology to deposit nanometer-thin photosensitive anodes. As a result, imaging using backscattered electrons is demonstrated for 50-eV electron landing energy values. The detector is built up of several closely packed photodiodes, and to obtain high scanning speed, each photodiode is engineered with low series resistance and low capacitance values. The low capacitance (<; 3 pF/mm2) is facilitated by thick, almost intrinsically-doped epitaxial layers grown to achieve the necessarily wide depletion regions. For the low series resistance, diode metallization has been patterned into a conductive grid directly on top of the nanometer-thin PureB-layer front-entrance window. Finally, a through-wafer aperture in the middle of the detector is micromachined for flexible positioning in the SEM system.

W.B. de Boer

Papers

Diffusion in strained Si(Ge).

Low-temperature chemical vapor deposition of epitaxial Si and SiGe layers at atmospheric pressure

On the optimization of SiGe-base bipolar transistors

QUBiC4X: An f/sub T//f/sub max/ = 130/140GHz SiGe:C-BiCMOS manufacturing technology witg elite passives for emerging microwave applications

High-Efficiency Silicon Photodiode Detector for Sub-keV Electron Microscopy