Werner Weber

TL;DR: In this paper, a label identification system comprised of a transmitting-receiving unit (1) and identification labels (2) on which the identification information (5) is stored in the form of a digital identification information word is described.

TL;DR: In this paper, a method of reading magnetoresistive memories was proposed, where a bit line is connected to first poles of the memory cells of a column and word lines are connected to second poles of memory cells.

TL;DR: In this article, a set of processor units, where each processor unit is coupled with an adjacent processor unit, are coupled with a control computer for exchanging of information with the processor units and a device such as a lamp, machine or complete production system is electrically coupled with processor arrangement to control a control unit of the set of control units.

TL;DR: In this article, a 3D integrated micro electromechanical system (MEMS) and the ideas behind the selection of stacking technologies are presented in order to reduce the foot print of existing MEMS products and enable production of miniaturized sensor nodes on a large scale.

Abstract: As a consequence of DRAM memory cell miniaturization, the available space for read/write amplifiers decreases in width from hitherto 4 bit line grids to 2 bit lines grids. Conventionally previously known read/write amplifiers cannot be accommodated on this reduced, still available space. Therefore, it has not been possible hitherto to provide read/write amplifiers arranged beside one another which would manage with the novel DRAM memory cell spacings. The principle underlying the invention is based on replacing at least some of the transistors of conventional design which are usually used for read/write circuits by "vertical transistors" in which the differently doped regions are arranged one above the other or practically one above the other. Compared with the use of conventional transistors, the use of vertical transistors saves enough space to ensure an arrangement of a read/write circuit in the grid even with a reduced grid width.