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Power Electronics Converters Applications And Design

High aspect ratio (HAR) silicon etch is reviewed, including commonly used terms, history, main applications, different technological methods, critical challenges, and main theories of the technologies. Chronologically, HAR silicon etch has been conducted using wet etch in solution, reactive ion etch (RIE) in low density plasma, single-step etch at cryogenic conditions in inductively coupled plasma (ICP) combined with RIE, time-multiplexed deep silicon etch in ICP-RIE configuration reactor, and single-step etch in high density plasma at room or near room temperature. Key specifications are HAR, high etch rate, good trench sidewall profile with smooth surface, low aspect ratio dependent etch, and low etch loading effects. Till now, time-multiplexed etch process is a popular industrial practice but the intrinsic scalloped profile of a time-multiplexed etch process, resulting from alternating between passivation and etch, poses a challenge. Previously, HAR silicon etch was an application associated primarily with microelectromechanical systems. In recent years, through-silicon-via (TSV) etch applications for three-dimensional integrated circuit stacking technology has spurred research and development of this enabling technology. This potential large scale application requires HAR etch with high and stable throughput, controllable profile and surface properties, and low costs.

High aspect ratio silicon etch: A review

Pull-in instability as an inherently nonlinear and crucial effect continues to become increasingly important for the design of electrostatic MEMS and NEMS devices and ever more interesting scientifically. This review reports not only the overview of the pull-in phenomenon in electrostatically actuated MEMS and NEMS devices, but also the physical principles that have enabled fundamental insights into the pull-in instability as well as pull-in induced failures. Pull-in governing equations and conditions to characterize and predict the static, dynamic and resonant pull-in behaviors are summarized. Specifically, we have described and discussed on various state-of-the-art approaches for extending the travel range, controlling the pull-in instability and further enhancing the performance of MEMS and NEMS devices with electrostatic actuation and sensing. A number of recent activities and achievements methods for control of torsional electrostatic micromirrors are introduced. The on-going development in pull-in applications that are being used to develop a fundamental understanding of pull-in instability from negative to positive influences is included and highlighted. Future research trends and challenges are further outlined.

Electrostatic pull-in instability in MEMS/NEMS: A review

(IEEE Transactions on Electron Devices,36(12):2816-2820)Field-Drifting Resonant Tunneling Through a-Si:H/a-Sil-xCx:H Quantum Wells at Different Locations of the i-Layer of a p-i-n Structure

An intensive study has been performed to understand and tune deep reactive ion etch (DRIE) processes for optimum results with respect to the silicon etch rate, etch profile and mask etch selectivity (in order of priority) using state-of-the-art dual power source DRIE equipment. The
research compares pulsed-mode DRIE processes (e.g. Bosch technique) and mixed-mode DRIE processes (e.g. cryostat technique). In both techniques, an inhibitor is added to
fluorine-based plasma to achieve directional etching, which is formed out of an oxide-forming (O2) or a fluorocarbon (FC) gas (C4F8 or CHF3). The inhibitor can be introduced together with the etch gas, which is named a mixed-mode DRIE process, or the inhibitor can be added in a
time-multiplexed manner, which will be termed a pulsed-mode DRIE process. Next, the most convenient mode of operation found in this study is highlighted including some remarks to
ensure proper etching (i.e. step synchronization in pulsed-mode operation and heat control of the wafer). First of all, for the fabrication ......
 Enjoy reading . Henri Jansen 18 June 2008

https://iopscience.iop.org/article/10.1088/0960-1317/19/3/033001/pdf

Black silicon method X: a review on high speed and selective plasma etching of silicon with profile control: an in-depth comparison between Bosch and cryostat DRIE processes as a roadmap to next generation equipment

Advanced etching of silicon based on deep reactive ion etching for silicon high aspect ratio microstructures and three-dimensional micro- and nanostructures

This paper reports the design, fabrication and control of arrayed microelectromechanical systems (MEMS)-based actuators for distributed micromanipulation by generation and control of an air-flow force field. The authors present an original design of pneumatic microactuator, improving reliability and durability of a distributed planar micromanipulator described in the previous study. The fabrication process is based on silicon-on-insulator (SOI) wafer and HF (hydroflouric acid) vapor release, which also significantly increases the production yield of the 560 microactuator array device of 35times35 mm2. Minimization of the electrostatic actuation pull-in voltage through suspension shaping fabrication was also studied, and successfully validated for electrical efficiency improvement. A distributed control method to achieve good conveyance performance and reduce motion control instability was investigated. An emulation approach was chosen to validate a decentralized control strategy on the distributed active surface in order to conduct a proof-of-concept of a future smart structure, integrating sensors, intelligence, and microactuators. Thus, a centralized/decentralized control flow, inspired by autonomous mobile robot principles, was applied. It was modeled and implemented using C-programming language. Experimental and characterization results validate the control method for feedback micromanipulation with good velocity and load capacity performance

Design, fabrication, and control of MEMS-based actuator arrays for air-flow distributed micromanipulation

Vertical Bragg grating mirrors are realized by the anisotropic etching of Si using deep reactive ion etching (DRIE), thus producing multiple vertical interfaces between Si and air. The Bragg mirrors are used to realize two optical filter configurations. The first is a tunable Fabry-Peacuterot cavity composed of two mirrors, where tuning is achieved by moving one of the mirrors using silicon-on-insulator (SOI) electrostatic microelectromechanical system (MEMS) actuation. The second is a drop filter, where a tilted Bragg mirror acts as a wavelength selective reflector. The enhanced etching process involving a mix of cryogenic and Bosch DRIE processes is presented. The realized structures, fabrication process, as well as measured performance are also presented

Free-Space Tunable and Drop Optical Filters Using Vertical Bragg Mirrors on Silicon

A shadow mask with high pattern flexibility is realized by deep reactive ion etching (RIE) on Si wafer. The novel features of the mask are the presence of a mechanical alignment structure and of patterns with isolated islands inside them. The advantage of this shadow mask is the possibility of deposition of any kind of pattern shape by evaporation or sputtering on a sample that is precisely positioned. Moreover, by this technique, deposition is realized without damaging electronic devices or micromachined structures on the sample. Precise positioning of the sample with respect to the shadow mask is allowed by the mechanical alignment structures. Some doughnut-shape-like patterns are obtained by deposition through the patterns with isolated islands inside them. In this article we will describe the realization and the application of such a shadow mask.

https://iopscience.iop.org/article/10.1088/0960-1317/10/2/310/pdf

A silicon shadow mask for deposition on isolated areas

In this paper, the authors have developed and implemented a decentralized decision-making strategy using field-programmable gate array (FPGA) technology as a prototype for an integrated controller of a microelectromechanical systems (MEMS) array for air-flow planar micromanipulation. The MEMS array was proposed to be integrated in a hybrid multichip module containing the FPGA-based controller. Algorithms and architectures, used for the decentralized control implementation and the hardware resource optimization, are described. A charge-coupled device camera was used to make each MEMS like an autonomous system when the distributed MEMS chip was tested. Finally, under air-flow condition, the FPGA-based decentralized control system successfully performed an object manipulation.

Yoshio Mita

Papers

Advanced etching of silicon based on deep reactive ion etching for silicon high aspect ratio microstructures and three-dimensional micro- and nanostructures

Design, fabrication, and control of MEMS-based actuator arrays for air-flow distributed micromanipulation

Free-Space Tunable and Drop Optical Filters Using Vertical Bragg Mirrors on Silicon

A silicon shadow mask for deposition on isolated areas

FPGA-Based Decentralized Control of Arrayed MEMS for Microrobotic Application