Z
Zheng Yan
Researcher at Shanghai Jiao Tong University
Publications - 490
Citations - 12887
Zheng Yan is an academic researcher from Shanghai Jiao Tong University. The author has contributed to research in topics: Computer science & Cloud computing. The author has an hindex of 47, co-authored 420 publications receiving 8786 citations. Previous affiliations of Zheng Yan include Helsinki University of Technology & Huawei.
Papers
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Journal ArticleDOI
Redundancy Removing Aggregation Network With Distance Calibration for Video Face Recognition
TL;DR: A redundancy removing aggregation network (RRAN) for video face recognition that can diminish the overall influence of poor quality components with large proportion in the video and further improve the overall recognition performance with individual difference is proposed.
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Simulation embedded artificial intelligence search method for supplier trading portfolio decision
TL;DR: In this paper, the authors proposed a new model based on expected utility theory (EUT) and employed a hybrid genetic algorithm (GA) and Monte-Carlo simulation technique as solution approach to deal with the trading portfolios whose return distribution is non-normal.
Journal ArticleDOI
Improving Data Generalization With Variational Autoencoders for Network Traffic Anomaly Detection
TL;DR: In this paper, a combined architecture comprising a Conditional Variational AutoEncoder (CVAE) and a Random Forest (RF) classifier is proposed to automatically learn similarity among input features, provide data distribution in order to extract discriminative features from original features, and finally classify various types of attacks.
Journal ArticleDOI
A deep density based and self-determining clustering approach to label unknown traffic
TL;DR: In this article , the authors applied multiple unsupervised algorithms and a co-association matrix to detect attack clusters of any shape as long as they have density-connected elements.
Patent
Apparatus and method for determining a decision recommendation in a network
TL;DR: In this article, an example apparatus is provided that includes a processor and a memory storing executable instructions that in response to execution by the processor cause the apparatus to at least perform a number of operations.