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Showing papers by "Hewlett-Packard published in 1985"


Journal ArticleDOI
Taher Elgamal1
23 Aug 1985
TL;DR: A new signature scheme is proposed, together with an implementation of the Diffie-Hellman key distribution scheme that achieves a public key cryptosystem that relies on the difficulty of computing discrete logarithms over finite fields.
Abstract: A new signature scheme is proposed, together with an implementation of the Diffie-Hellman key distribution scheme that achieves a public key cryptosystem. The security of both systems relies on the difficulty of computing discrete logarithms over finite fields.

7,514 citations


Journal ArticleDOI
01 Jul 1985
TL;DR: This paper reports on a variety of algorithms that exploit a tree of one-bit adders that can evaluate linear expressions Ax+By+C for every pixel simultaneously, as fast as the ALUs and the memory circuits can accept the results.
Abstract: Pixel-planes is a logic-enhanced memory system for raster graphics and imaging. Although each pixel-memory is enhanced with a one-bit ALU, the system's real power comes from a tree of one-bit adders that can evaluate linear expressions Ax+By+C for every pixel (x,y) simultaneously, as fast as the ALUs and the memory circuits can accept the results. We and others have begun to develop a variety of algorithms that exploit this fast linear expression evaluation capability. In this paper we report some of those results. Illustrated in this paper is a sample image from a small working prototype of the Pixel-planes hardware and a variety of images from simulations of a full-scale system. Timing estimates indicate that 30,000 smooth shaded triangles can be generated per second, or 21,000 smooth-shaded and shadowed triangles can be generated per second, or over 25,000 shaded spheres can be generated per second. Image-enhancement by adaptive histogram equalization can be performed within 4 seconds on a 512x512 image.

252 citations


Journal Article
TL;DR: In this paper, Sort, Scan and DebitCredit benchmarks are defined, which measure the performance of diverse transaction processing systems, and a standard system cost measure is stated and used to define price/performance metrics.
Abstract: Three benchmarks are defined: Sort, Scan and DebitCredit. The first two benchmarks measure a system's input/output performance. DebitCredit is a simple transaction processing application used to define a throughput measure -Transactions Per Second (TPS). These benchmarks measure the performance of diverse transaction processing systems. A standard system cost measure is stated and used to define price/performance metrics. A condensed version of this paper appears in Datamation, April 1, 1985

245 citations


Journal ArticleDOI
Susan E. Brennan1
01 Jan 1985-Leonardo
TL;DR: The Caricature Generator program is used to create caricatures by amplifying the differences between the face to be caricatured and a comparison face, which simulates the visualization process in the imagination of the caricaturist.
Abstract: The author has researched and developed a theory of computation for caricature and has implemented this theory as an interactive computer graphics program. The Caricature Generator program is used to create caricatures by amplifying the differences between the face to be caricatured and a comparison face. This coninuous, paralle amplification of facial features on the computer screen simulates the visualization process in the imagination of the caricaturist. The result is a recognizable, animated caricature, generated by computer and mediated by an individual who may or may not have facility for drawing, but who, like most human beings, is expert at visualizing and recognizing faces.

170 citations


Patent
28 Oct 1985
TL;DR: In this article, a low overhead way for insuring that only routines of sufficient privilege can execute on a secured page of memory in an hierarchial computer system, and for raising the privilege level of a low privilege process in an orderly and secure way is presented.
Abstract: A low overhead way for insuring that only routines of sufficient privilege can execute on a secured page of memory in an hierarchial computer system, and for raising the privilege level of a low privilege process in an orderly and secure way is presented. This is done through the execution of a single "gateway" branch instruction standing between a procedure call by a lower privileged routine, such as a user program, and an operating system itself.

140 citations


Journal ArticleDOI
TL;DR: It is concluded that errors occur when there is a loss of information in the working memory representation of the problem and when the resulting answer still looks reasonable.
Abstract: Four experiments study the errors students make using LISP functions. The first two experiments show that frequency of errors is increased by increasing the complexity of irrelevant aspects of the problem. The experiments also show that the distribution of errors is largely random and that subjects' errors seem to result from slips rather than from misconceptions. Experiment 3 shows that subjects' errors tend to involve loss of parentheses in answers when the resulting errors are well-formed LISP expressions. Experiment 4 asks subjects, who knew no LISP, to judge the reasonableness of the answers to various LISP function calls. Subjects could detect many errors on the basis of general criteria of what a reasonable answer should look like. On the basis of these four experiments, we conclude that errors occur when there is a loss of information in the working memory representation of the problem and when the resulting answer still looks reasonable.

138 citations


Proceedings ArticleDOI
08 Jul 1985
TL;DR: It is argued that the mechanisms for structure-sharing not only provide the ability to express important linguistic generalization about the lexicon, but also make possible an efficient, readily modifiable implementation that is quite adequate for continuing development of a large natural language system.
Abstract: The lexicon now plays a central role in our implementation of a Head-driven Phrase Structure Grammar (HPSG), given the massive relocation into the lexicon of linguistic information that was carried by the phrase structure rules in the old GPSG system. HPSG's grammar contains fewer than twenty (very general) rules; its predecessor required over 350 to achieve roughly the same coverage. This simplification of the grammar is made possible by an enrichment of the structure and content of lexical entries, using both inheritance mechanisms and lexical rules to represent the linguistic information in a general and efficient form. We will argue that our mechanisms for structure-sharing not only provide the ability to express important linguistic generalization about the lexicon, but also make possible an efficient, readily modifiable implementation that we find quite adequate for continuing development of a large natural language system.

109 citations


Journal ArticleDOI
TL;DR: In this paper, the authors present evidence that cooling the ions by collisions with atoms of a background gas light compared to the ions results in the condensation of the ions into a cloud of almost uniform density determined by space charge versus potential well forces.
Abstract: The largest systematic uncertainty in the performance of atomic frequency standards using a cloud of ions stored in an rf quadrupole trap is the second-order Doppler shift which depends on ion temperature and trapping parameters. This paper presents evidence that cooling the ions by collisions with atoms of a background gas light compared to the ions results in the condensation of the ions into a cloud of almost uniform density determined by space charge versus potential well forces. In this condition the second-order Doppler shift is simple to calculate and is found to depend only on readily measured characteristics of the ion cloud. This along with already observed good signal-to-noise ratio shows that the frequency standard we have constructed using the hyperfine splitting of singly ionized199Hg, with helium cooling can have an order of magnitude better performance in accuracy, stability, and reproducibility than presently available commercial cesium beam standards.

95 citations


Journal ArticleDOI
TL;DR: A state model is presented which clarifies various coherence mechanisms as well as introduces a new state to enable the multicache system to more efficiently handle the processor writes.
Abstract: A coherence problem may occur in a multicache system as soon as data inconsistency exists in the private caches and the main memory. Without an effective solution to the coherence problem, the effectiveness of a multicache system will be inherently limited. The problem is closely examined in this paper and previous solutions, both centralized approaches and distributed approaches, are analyzed based on the notion of semicritical sections. A state model is then presented which clarifies various coherence mechanisms as well as introduces a new state to enable the multicache system to more efficiently handle the processor writes. Software guidance, for performance and not for integrity, is advocated in a new proposal which in a practical multicache environment explores the benefit of the new state with little cost.

92 citations


Patent
18 Jan 1985
TL;DR: In this paper, a system is designed by a computer performed method using object oriented programming in which the manipulative programs are linked to the data records which represent the various elements in the system.
Abstract: A system is designed by a computer performed method using object oriented programming in which the manipulative programs are linked to the data records which represent the various elements in the system. The data records are linked by pointers in a hierarchy so that operations proceed from link to link without the need for interpreting character string commands. Only the highest level commands must be interpreted in a time consuming manner. Thereafter, the program proceeds quickly from linked data record to linked data record.

91 citations


Patent
Leonard Mark1
19 Jun 1985
TL;DR: In this article, the light detectors are interdigitated such that they are adjacent to one another and receive information from two channels, and the output signals are combined electronically in pairs forming quadrature push pull signals.
Abstract: An optical shaft encoder has a light detector configuration that includes the function of a phase plate. The light detectors are one-half the width of a code wheel transmissive section and are arranged in groups of four so that each group corresponds to one pitch of the code wheel. The light detectors are interdigitated such that they are adjacent to one another and receive information from two channels. One light beam illuminates the four light detectors producing four electrical signals. The physical layout of the light detectors causes the output signals to be phase shifted 90° from each other. These signals are combined electronically in pairs forming quadrature push pull signals.

Journal ArticleDOI
TL;DR: In this paper, it was shown that linear temperature programmed retention indices can only be calculated from isothermal retention data if the temperature dependence of both the distribution coefficients and the column dead time are taken into account.
Abstract: Summary Direct conversion of isothermal to temperature programmed indices is not possible. In this work it is shown that linear temperature programmed retention indices can only be calculated from isothermal retention data if the temperature dependence of both the distribution coefficients and the column dead time are taken into account. Procedures are described which allow calculation of retention temperatures and from these, accurate programmed retention indices. Within certain limits the initial oven temperature and programming rate can be chosen freely.The prerequisite forthis calculation

Patent
20 Dec 1985
TL;DR: In this article, a logic state analyzer allows a user to include symbols defined in source program listings, as well as other specially defined symbols, in the trace specification, and where possible, all address, operands, etc., are expressed in such terms.
Abstract: A logic state analyzer allows a user to include symbols defined in source program listings, as well as other specially defined symbols, in the trace specification. Such symbols represent unique individual values or ranges of values. The resulting trace list includes these symbols, and where possible, all address, operands, etc., are expressed in such terms. When those symbols are relocatable entities produced by compilers and assemblers the result is that the user is freed from having to duplicate the relocation process to specify absolute values in the trace specification, and later reverse it to interpret absolute values in the listing in terms of symbols originally defined in the source programming. A further result is that the states within an arbitrary finite state machine can be assigned descriptive labels, with the trace specification and trace listing subsequently expressed in those terms. Trace values can also be represented relative to a symbol. The same principles are extendable to handle memory segment offsets invoked by memory management units that automatically convert a relocated virtual address emitted by a processor into a dynamically adjusted run time physical address actually sent to the memory. According to a preferred embodiment of the invention the analyzer makes use of various symbol tables produced by any associated assemblers and compilers, as well as of any additional special symbol definitions desired by the user. The analyzer provides absolute values for these symbols by application of the load map produced during the relocation of the various programs into the target system monitored by the logic analyzer.

Patent
31 Jan 1985
TL;DR: In this paper, a software debugging analyzer nonintrusively acquires data concerning the execution of software on a real-time basis, which is stored in memory in either a sequential or random access mode.
Abstract: A software debugging analyzer nonintrusively acquires data concerning the execution of software on a real-time basis. Low-level event recognition is accomplished with programmable comparators, whose outputs are fed to high-level recognition comparators to define complex events. Dynamic recognition is provided by recognition cmparators programmable on a real time basis as variables are actuated. Acquired data is stored in memory in either a sequential or random access mode. A microprocessor translates high level commands into event constructs and processes the acquired data into a format suitable for display to a user.

Patent
30 Oct 1985
TL;DR: In this paper, a data telecommunications system and method is provided for sending a data stream of characters in distinct data packets between two units of data terminal equipment (which can be either terminals and/or computers) connected over communication lines.
Abstract: A data telecommunications system and method is provided for sending a data stream of characters in distinct data packets between two units of data terminal equipment (which can be either terminals and/or computers) connected over communication lines. A modem is connected between each unit of data terminal equipment and the communication lines, and one initiating modem includes a means for changing the packet size of the data which is transmitted. The receiving modem checks the packets for errors, and if errors are found, the packet is retransmitted. The initiating modem counts the number of transmissions of data packets as well as the number of retransmissions of data packets. A ratio of retransmissions to transmissions is used to determine the optimum packet size. The packet size is continually subject to change as the ratio changes during transmission.

Patent
Carl G. Harkins1
20 Dec 1985
TL;DR: In this article, a chemical filter is provided for preventing pollutants in the atmosphere from contaminating sensitive electronic equipment, such as hard disc drives, by using a mixture of charcoal or charcoal-impregnated foam to remove organic contaminants and at least one layer of high surface area metal to remove inorganic pollutants.
Abstract: A chemical filter is provided for preventing pollutants in the atmosphere from contaminating sensitive electronic equipment, such as hard disc drives. The chemical filter comprises a layer of charcoal or charcoal-impregnated foam to remove organic contaminants and at least one layer of a high surface area metal to remove inorganic pollutants, such as SO2, H2 S, NO2 and Cl2. In one embodiment, the chemical filter comprises a layer of charcoal, a layer of a copper foam, a layer of a nickel foam and a layer of a particle filter. A method is also provided for preventing pollutant molecules in the atmosphere from contaminating electronic equipment. The method comprises interposing the chemical filter of the invention between the electronic equipment and the source of the pollution, introducing polluted air into the chemical filter, reacting pollutant molecules with the high surface area metal, and introducing filtered air to the electronic equipment.

Patent
23 Oct 1985
TL;DR: In this paper, a computer and an instruction set are presented which allow for a number of assists to be easily incorporated into the computer, and which allows for an extension of the instruction set.
Abstract: A computer and an instruction set are presented which allow for a number of assists to be easily incorporated into the computer, and which allow for an instruction set extension. The computer is designed to support instructions which move data between an assist and a location, although an assist's operation and design need not be defined at the computer's date of design. Instructions are mapped to a particular assist. Assist instructions can be either executed in hardware by an assist, or emulated in software via a trap.

Patent
04 Dec 1985
TL;DR: In this article, a layered structure for use in an X-ray membrane (pellicle) mask or a vacuum window is provided in which an intermediate amorphous layer such as silicon dioxide is grown on a silicon substrate which provides a stress relief medium and surface properties which enhance and improve subsequent process layers by breaking the epitaxial nature of these later deposited layers.
Abstract: A layered structure for use in an X-ray membrane (pellicle) mask or a vacuum window is provided in which an intermediate amorphous layer such as silicon dioxide is grown on a silicon substrate which provides a stress relief medium and surface properties which enhance and improve subsequent process layers by breaking the epitaxial nature of these later deposited layers. Upon subsequent deposition of an inorganic overcoat, such as SiC, on the intermediate amorphous layer, the overcoat produces a nearly defect-free layer with a substantially reduced stress of suitable quality for X-ray lithography mask fabrication. Furthermore, additional alternating layers of a silicon carbide film and an intermediate inorganic layer, such as silicon nitride, can be deposited to obtain an even smoother silicon carbide surface and stronger structure.

Patent
20 Mar 1985
TL;DR: In this paper, a bus extender circuitry for data transmission from a first bus at a first site to a second bus at the second site, including a first transceiver at the first site, a second transceiver and a data and control signals transmission medium interconnecting both transceivers, is presented.
Abstract: not available for EP0039036Abstract of corresponding document: US4451886The present invention is related to bus extender circuitry for data transmission from a first bus at a first site to a second bus at a second site, includes a first transceiver at the first site, a second transceiver at the second site and a data and control signals transmission medium interconnecting both transceivers. The first transceiver receives data signals and interacts by means of control signals with the first bus which has data and control lines connected to a data source and possibly also to one or more receivers all located at the first site. The second transceiver receives data signals and interacts, by means of control signals, with the first transceiver to transmit data and control signals to the second bus; the second transceiver has data and control lines connected to one or more receivers at the second site.

Journal ArticleDOI
TL;DR: This article has discussed digital techniques as applied to image generation as well as to the analysis of image data (computer-assisted border detection, 3D reconstruction, tissue characterization, and contrast echocardiography); a general introduction to off-line analysis systems was also given.

Patent
10 May 1985
TL;DR: In this article, an interferometer having a beam generating section and a reflecting section is presented. Mechanisms are provided to direct a beam from the generating section to the reflecting section even when the reflecting part moves freely in three dimensions.
Abstract: An interferometer having a beam generating section and a reflecting section. Mechanisms are provided to direct a beam from the generating section to the reflecting section even when the reflecting section moves freely in three dimensions. Mechanisms are also provided to direct the beam back from the reflecting section to the generating section even when the reflecting section moves freely in three dimensions. A method is presented that enables the absolute distance between the generating and reflecting sections to be determined.

Proceedings ArticleDOI
08 Jul 1985
TL;DR: This paper focuses on parsing issues, but also gives a synopsis of the underlying syntactic formalism, which makes the HPSG system unique in its combination of linguistic theory and practical application.
Abstract: The Head-driven Phrase Structure Grammar project (HPSG) is an English language database query system under development at Hewlett-Packard Laboratories. Unlike other product-oriented efforts in the natural language understanding field, the HPSG system was designed and implemented by linguists on the basis of recent theoretical developments. But, unlike other implementations of linguistic theories, this system is not a toy, as it deals with a variety of practical problems not covered in the theoretical literature. We believe that this makes the HPSG system unique in its combination of linguistic theory and practical application.The HPSG system differs from its predecessor GPSG, reported on at the 1982 ACL meeting (Gawron et al. ([1982]), in four significant respects: syntax, lexical representation, parsing, and semantics. The paper focuses on parsing issues, but also gives a synopsis of the underlying syntactic formalism.

Patent
David V. James1
28 Jun 1985
TL;DR: In this paper, a method and apparatus for performing variable length data read transactions is presented in accordance with a preferred embodiment of the present invention, where the I/O device autonomously fetches elements on the linked list and executes them.
Abstract: A method and apparatus for performing variable length data read transactions is presented in accordance with a preferred embodiment of the present invention. An input/output (I/O) device which performs variable length data read transactions, such as one which includes a terminal, has associated with it a command linked list, located in system memory, in which a system processor or memory controller has placed command elements. For read transactions, each element typically specifies the place in system memory where data will be transferred, and the number of bytes of data to be transferred. The I/O device autonomously fetches elements on the linked list and executes them. As bytes are being transferred from the I/O device to system memory a residual byte count is kept by the I/O device. When the I/O device has completed the data transfer, it may interrupt or otherwise provide the system processor with status information as to the data transfer. Additionally, the system processor may terminate a data transfer by sending a special flush command to the I/O device. Upon receipt of the flush command, the I/O device stops the data transaction, and returns to the system processor the residual byte count. The residual byte count is used by the system processor to determine how many bytes of information were transferred to system memory.

Proceedings ArticleDOI
08 Jul 1985
TL;DR: The use of semantically compositional LISP procedures in place of lambda-schemas allows the HPSG language processing system to produce fully reduced translations on the fly, with no need for post-processing.
Abstract: In the new Head-driven Phrase Structure Grammar (HPSG) language processing system that is currently under development at Hewlett-Packard Laboratories, the Montagovian semantics of the earlier GPSG system (see [Gawron et al. 1982]) is replaced by a radically different approach with a number of distinct advantages. In place of the lambda calculus and standard first-order logic, our medium of conceptual representation is a new logical formalism called NFLT (Neo-Fregean Language of Thought); compositional semantics is effected, not by schematic lambda expressions, but by LISP procedures that operate on NFLT expressions to produce new expressions. NFLT has a number of features that make it well-suited for natural language translations, including predicates of variable arity in which explicitly marked situational roles supercede order-coded argument positions, sortally restricted quantification, a compositional (but nonextensional) semantics that handles causal contexts, and a principled conceptual raising mechanism that we expect to lead to a computationally tractable account of propositional attitudes. The use of semantically compositional LISP procedures in place of lambda-schemas allows us to produce fully reduced translations on the fly, with no need for post-processing. This approach should simplify the task of using semantic information (such as sortal incompatibilities) to eliminate bad parse paths.

Journal ArticleDOI
J. Hui1, S. Wong, J. Moll
TL;DR: In this paper, specific contact resistivities of the Al/TiW/TiSi 2 /Si system were characterized and it was found that without a TiW barrier layer, Al can penetrate through the TiSi 2 layer and significantly affect the interfacial contact resistance.
Abstract: Specific contact resistivities of the Al/TiW/TiSi 2 /Si system are characterized. It is found that without a TiW barrier layer, Al can penetrate through the TiSi 2 layer and significantly affect the TiSi 2 /Si interfacial contact resistance. Intrinsic TiSi 2 contact resistivities to n+and p+silicon are characterized with a TiW barrier between the silicide and the aluminum. TiSi 2 contact resistivity to n+silicon is found to be about one order of magnitude lower than that of Al to n+silicon. However, TiSi 2 to p+silicon contact resistivity is higher than that of Al to p+silicon and is very sensitive to the boron implant dose.

Patent
24 Jul 1985
TL;DR: An automated cassette handler for transporting a cassette containing integrated circuit wafers between first and second elevators in a standardized mechanical interface (SMIF) system for integrated circuit processing is described in this article.
Abstract: An automated cassette handler for transporting a cassette containing integrated circuit wafers between first and second elevators in a standardized mechanical interface (SMIF) system for integrated circuit processing. The handler is adapted to grip and transport the cassette while positively pushing the wafers into the cassette.

Patent
30 Oct 1985
TL;DR: In this article, a data telecommunications system and method in which at least one modem which, capable of operating at a variety of transmission speeds, selects the proper speed at which to operate.
Abstract: Disclosed is a data telecommunications system and method in which at least one modem which, capable of operating at a variety of transmission speeds, selects the proper speed at which to operate. An initiating modem capable of operating at a plurality of operating speeds compares the maximum operating speed of a receiving modem, and if a match is found, operation begins at that operating speed. If no match is found, operation begins at a default transmission speed.

Journal ArticleDOI
TL;DR: In this paper, the backside gate bias was used as a parameter to measure the transconductance of n-channel SOI MOSFETs and the authors used the numerical solution of Poisson's equation to model the performance of SOI transistors.
Abstract: Transconductance of n-channel Silicon-on-Insulator (SOI) MOSFET's has been measured with backside gate (substrate) bias as a parameter For negative values of the backside gate bias, transconductance of SOI transistors is similar to that of bulk devices On the other hand, transconductance exhibits an unusual behavior when backside gate is positively biased This is caused by mutual influence between the front-and the backside gate-related depletion zones Modeling of transconductance using numerical solution of Poisson's equation show good agreement with experimental results

Book ChapterDOI
Taher El Gamal1
18 Aug 1985
TL;DR: This paper presents some results for obtaining a sub exponential time algorithms for the remaining cases GF(pm) for p ?
Abstract: The problem of computing logarithms over finite fields has proved to be of interest in different fields [4]. Subexponential time algorithms for computing logarithms over the special cases GF(p), GF(p2) and GF(pm) for a fixed p and m ? ? have been obtained. In this paper, we present some results for obtaining a sub exponential time algorithms for the remaining cases GF(pm) for p ? ? and fixed m ? 1, 2. The algorithm depends on mapping the fieLd GF(pm) into a suitable cyclotomic extension of the integers (or rationals). Once an isomorphism between GF(pm) and a subset of the cyclotomic field Q(?q) is obtained, the algorithms becomes similar to the previous algorithms for m = 1, 2.A rigorous proof for subexponential time is not yet available, but using some heuristic arguments we can show how it could be proved. If a proof would be obtained, it would use results on the distribution of certain classes of integers and results on the distribution of some ideal classes in cyclotomic fields.

Patent
Bruce L. Ryder1
19 Jun 1985
TL;DR: In this article, a tube coupling device is constructed with a rigid body having cavity therein, an aperture communicating with the smaller end of said cavity and a tapered ferrule having an axial passageway that is aligned with the aperture.
Abstract: A tubing coupling device constructed in accordance with this invention is comprised of a rigid body having cavity therein, an aperture communicating with the smaller end of said cavity and a tapered ferrule having an axial passageway that is aligned with the aperture. Means such as a nut that is in threaded engagement with the end of the rigid body opposite the aperture forces the ferrule into the cavity. The relative shapes and dimensions of the cavity and the ferrule are such that as the ferrule is forced into the cavity it is subjected to radial compression so as to attain intimate contact with the exterior surfaces of the end portions of tubes that are inside the ferrule.