Tripura Institute of Technology

About: Tripura Institute of Technology is a based out in . It is known for research contribution in the topics: Electric power system & Renewable energy. The organization has 63 authors who have published 92 publications receiving 510 citations.

A New Hybrid Fractal based Color Image Compression in YCbCr Scheme and Discrete Cosine Transform with Quadtree and Isosceles Triangle Segmentation Approach

Abstract: Color Image compression has become an important technology to decrease memory space and to reduce transmission time. The present study provides comparative values between RGB and YCbCr color spaces with respect to PSNR, execution time and compression ratio. Fractal coding is a valuable method which utilizes for compression of color image. This method is most suitable for irregular shape of images. Long encoding times still remain as main disadvantage of this compression technique. A hybrid fractal coding technique based on YCbCr scheme and Discrete Cosine Transform (DCT) with quadtree and isosceles triangle segmentation is proposed in the present study. The study needs six phases, first, conversion of input RGB image to YCbCr scheme; second, the resulting image (YCbCr) is partitioned separately based on quadtree approach and isosceles triangle segmentation approach; third, DCT is applied to every block of the partition, fourth, scanning of every block value and zigzag manner is applied to prevent zero co-efficient; fifth, both quad tree and isosceles triangle segmentation approaches are applied separately for having partitioned resulting image; sixth, to compress the image, Run Length Encoding (RLE) approach is utilized. Test results demonstrate that proposed strategy gives higher compression ratio, PSNR value with high processing speed without degrading the image quality.

FPGA Implementation of Gradient Based Edge Detection Algorithms for Real Time Image

Abstract: In this paper a novel technique to implement gradient based edge detectors on FPGA platform is demonstrated. Three most popular gradient based edge detection algorithms viz. Sobel, Prewitt and Robert Cross are modelled in hardware description language and implemented on Terasic VEEK-MT FPGA development board. The RGB image is first transformed into gray scale using luminosity method which is fed to line buffers to apply appropriate edge detection mask. An edge detection processor block is designed wherein the relevant filter mask is applied followed by generation of horizontal and vertical gradient. The root mean square value of the two gradient components is computed. The pixel value so obtained is compared against a user defined threshold before applying to the LCD module for display. The proposed implementation is tested on both still and video images. Implementation result endorses the successful design of gradient based edge detection algorithm on FPGA platform.