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A 0.6V 2.9µW mixed-signal front-end for ECG monitoring

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TLDR
A mixed-signal ECG front-end that uses aggressive voltage scaling to maximize power-efficiency and facilitate integration with low-voltage DSPs is presented in this paper, where a SAR ADC with a dual-DAC architecture eliminates the need for a power-hungry ADC buffer.
Abstract
This paper presents a mixed-signal ECG front-end that uses aggressive voltage scaling to maximize power-efficiency and facilitate integration with low-voltage DSPs. 50/60Hz interference is canceled using mixed-signal feedback, enabling ultra-low-voltage operation by reducing dynamic range requirements. Analog circuits are optimized for ultra-low-voltage, and a SAR ADC with a dual-DAC architecture eliminates the need for a power-hungry ADC buffer. Oversampling and ΔΣ-modulation leveraging near-V T digital processing are used to achieve ultra-low-power operation without sacrificing noise performance and dynamic range. The fully-integrated front-end is implemented in a 0.18µm CMOS process and consumes 2.9µW from 0.6V.

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Citations
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References
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A Configurable and Low-Power Mixed Signal SoC for Portable ECG Monitoring Applications

TL;DR: This paper describes a mixed-signal ECG System-on-Chip (SoC) that is capable of implementing configurable functionality with low-power consumption for portable ECG monitoring applications and can be reduced significantly.
Proceedings ArticleDOI

A 0.013mm 2 5μW DC-coupled neural signal acquisition IC with 0.5V supply

TL;DR: This work presents a neural interface in 65nm CMOS and operating at a 0.5V supply that obtains performance comparable or superior to state-of-the-art systems in a silicon area over 3× smaller by using a scalable architecture that avoids on-chip passives and takes advantage of high-density logic.
Journal ArticleDOI

Direct digital synthesis: a tool for periodic wave generation (part 1)

TL;DR: An overview of the basics of DDS, along with simple formulas to compute bounds of the signal characteristics, are given and several methods are presented to overcome some of the limits of the basic DDS with a focus on improving output signal quality.
Proceedings ArticleDOI

A 30µW Analog Signal Processor ASIC for biomedical signal monitoring

TL;DR: The presented Analog Signal Processor (ASP) not only addresses the power efficient extraction of ECG signals, but also improves the state-of-the-art by providing a low-power means for both reducing the data rate ofECG signals through adaptive sampling and improving the robustness by monitoring motion artifacts.
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