Journal ArticleDOI
A Practical Approach to Fault Simulation and Test Generation for Bridging Faults
Abramovici,Menon +1 more
TLDR
This approach is based on extending fault simulation and test generation for stuck faults to cover bridging faults as well, and shows that adequate bridging fault coverage can be obtained in most cases without using sequences of vectors.Abstract:
In this correspondence we prepent a practical approach to fault simulation and test generation for bridging faults in combinational circuits. Unlike previous work, we consider Unrestricted bridging faults, including those that introduce feedback. Our approach is based on extending fault simulation and test generation for stuck faults to cover bridging faults as well. We consider combinational testing only, and show that adequate bridging fault coverage can be obtained in most cases without using sequences of vectors.read more
Citations
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Proceedings ArticleDOI
Current vs. logic testing of gate oxide short, floating gate and bridging failures in cmos
TL;DR: These physical defects widely encountered i n ioday’s CMOS processes, are modelled taking into account t h e topology o f the defective circuit and the parameters of the technology used.
Proceedings ArticleDOI
Detecting bridging faults with stuck-at test sets
TL;DR: A method is described that provides high detection of bridging faults without requiring extensive fault simulation, and a simple solution is to randomly reorder the test vectors to increase toggling and therefore increase bridging fault coverage.
Proceedings ArticleDOI
Accurate modeling and simulation of bridging faults
J.A. Acken,Steven D. Millman +1 more
TL;DR: In this paper, a transistor-level examination of bridging faults and the resulting logic-level bridging fault model are described, and an approach for test pattern generation and fault simulation is presented.
Proceedings ArticleDOI
The concept of resistance interval: a new parametric model for realistic resistive bridging fault
TL;DR: A new parametric bridging fault model is proposed allowing to realistically represent the faulty behavior according to the intrinsic resistance which is not known a priori.
Proceedings ArticleDOI
Resistive bridge fault modeling, simulation and test generation
V.R. Sar-Dessai,Duncan M. Walker +1 more
TL;DR: In this article, the authors developed a model of resistive bridging faults and studied the fault coverage on ISCAS85 circuits of different test sets using resistive and zero-ohm bridges at different supply voltages.
References
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Journal ArticleDOI
Enhancing Testability of Large-Scale Integrated Circuits via Test Points and Additional Logic
M.J.Y. Williams,J.B. Angell +1 more
TL;DR: With the increasing complexity of logic that can be fabricated on a single large-scale integrated (LSI) circuit chip, there is a growing problem of checking the logical behavior of the chips at manufacture.
Journal ArticleDOI
A Deductive Method for Simulating Faults in Logic Circuits
TL;DR: A deductive method of fault simulation is described, which "deduces" the faults defected by a test at the same time that it simulates explicitly only the good behavior of logic circuit.
Journal ArticleDOI
Critical Path Tracing: An Alternative to Fault Simulation
TL;DR: Critical path tracing determines fault detection without explicit fault simulation, and appears to be a more efficient alternative to conventional methods.
Journal ArticleDOI
Bridging and Stuck-At Faults
TL;DR: The commonly used stuck-at fault fails to model logic circuit shorts, so Bridging faults are defined to model these circuit mal-functions.
Journal ArticleDOI
Concurrent simulation of nearly identical digital networks
E. G. Ulrich,T. Baker +1 more
TL;DR: Test patterns for testing digital circuits are usually checked on a test verification program to determine if all or most of the possible faults will be detected.