A Systolic Architecture for Real-Time Composite Video Image Coding

TLDR: This work emphasizes on the implementation of multistage VQ which can significantly reduce the computation load due to much smaller codebooks required and the repetitive nature of VQ error computation and codebook vectors comparison points to us that VQ can be VLSI implemented to make real-time applications possible.

Abstract: Secure and reliable image transmission is achieved using a representation of video images in digital form and digital communication techniques However, the digital representation results in a large increase in the transmission bandwidth required Hence the need for coding or compression techniques that will reduce the bandwidth required or equivalently the bit-rate involved as much as possible for a given level of reconstructed image quality From Information Theory, we know that it is possible to obtain better performance by coding vectors of picture elements instead of coding the individual pixels Nevertheless, application of Vector Quantizers is limited due to the high computational complexity With curent VLSI technology this can be changed The repetitive nature of VQ error computation and codebook vectors comparison points to us that using special structure such as systolic type architecture, VQ can be VLSI implemented to make real-time applications possible Along with full search VQ, we emphasize on the implementation of multistage VQ which can significantly reduce the computation load due to much smaller codebooks required Examples of processed images are presented to show the validity of such an approach