Proceedings ArticleDOI
A unified algorithm for elementary functions
J. S. Walther
- pp 379-385
TLDR
This paper describes a single unified algorithm for the calculation of elementary functions including multiplication, division, sin, cos, tan, arctan, sinh, cosh, tanh, arCTanh, In, exp and square-root.Abstract:
This paper describes a single unified algorithm for the calculation of elementary functions including multiplication, division, sin, cos, tan, arctan, sinh, cosh, tanh, arctanh, In, exp and square-root The basis for the algorithm is coordinate rotation in a linear, circular, or hyperbolic coordinate system depending on which function is to be calculated The only operations required are shifting, adding, subtracting and the recall of prestored constants The limited domain of convergence of the algorithm is calculated, leading to a discussion of the modifications required to extend the domain for floating point calculationsread more
Citations
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Proceedings ArticleDOI
Algorithms and VLSI architectures for RLS-based time reference beamforming in mobile communications
TL;DR: It is demonstrated how to map this algorithm onto a highly efficient systolic array architecture entirely consisting of identical processing elements which rely on CORDIC arithmetic to carry out all the required computations, thus enabling very economic VLSI implementations.
Proceedings ArticleDOI
Low Latency VLSI Architecture for the Radix-4 CORDIC Algorithm
B. Lakshmi,Anindya Sundar Dhar +1 more
TL;DR: This paper is proposing a pipelined architecture for the VLSI implementation of radix-4 CORDIC rotator with redundant arithmetic to achieve low latency compared to the available architectures.
Journal ArticleDOI
Automation Schemes for FPGA Implementation of Wave-Pipelined Circuits
G. Seetharaman,B. Venkataramani +1 more
TL;DR: BIST and SOC approaches are proposed for automating this adjustment of operating frequencies of combinational logic circuits and they are evaluated by implementation of filters using a Distributed Arithmetic Algorithm (DAA) and sinewave generator using the COordinate Rotation DIgital Computer (CORDIC).
Proceedings ArticleDOI
A fractional sample rate conversion filter for a software radio receiver on FPGA
TL;DR: An architectural implementation of Digital Down Converter (DDC) for multi-standard radio based on multiplexed Cascaded Integrator Comb (CIC) decimation filters is presented and a reconfigurable Farrow filter can be easily designed for matching the symbol rate of any radio standard with the same hardware resources.
Patent
Cordic implementation of multi-dimensional plane rotation over the complex field
TL;DR: In this article, the CORDIC rotations over the complex field are implemented with interconnected CordIC blocks, each of which is used to generate the rotated elements of a complex vector.
References
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Journal ArticleDOI
The CORDIC Trigonometric Computing Technique
TL;DR: The trigonometric algorithms used in this computer and the instrumentation of these algorithms are discussed in this paper.
Journal ArticleDOI
Decimal-Binary Conversions in CORDIC
TL;DR: The CORDIC conversion technique is sufficiently general to be applied to decimal-binary conversion problems involving other mixed radix systems and other decimal codes.