An efficient implementation of PRNGs based on the digital sawtooth map

TLDR: In this paper, the digital implementation of the sawtooth map is analyzed to evaluate its suitability for pseudo-random binary numbers generation. But, the results show that values of design parameters that lead to adequate statistical features and to a relatively high period also allow for significantly reducing the complexity required in the implementation.

Abstract: In this paper, the sawtooth map digitally implemented is analysed to evaluate its suitability for pseudo-random binary numbers generation. Period and statistical properties of the sequences generated by the digital map are evaluated versus arithmetic precision, approximation strategy and characteristic parameter of the map. In general, the digital implementation of the sawtooth map requires the use of a multiplier, which is quite expensive in terms of gate count. However, results show that values of design parameters that lead to adequate statistical features and to a relatively high period also allow for significantly reducing the complexity required in the implementation. To better evaluate performance of the digital sawtooth map as a pseudo-random number generator, it is compared to a linear feedback shift register with the same number of flip-flops, which is well known for its output sequences with a long period, appealing statistical quality, and for a reduced gate count. Performance comparison and implementation on a programmable logic device show that the digital sawtooth map is suitable for pseudo-random number generation, also requiring a relatively small amount of hardware. Copyright © 2004 John Wiley & Sons, Ltd.