Journal ArticleDOI
Diagnosing arbitrary defects in logic designs using single location at a time (SLAT)
TLDR
A new form of logic diagnosis is described that is suitable for diagnosing fails in combinational logic and can diagnose failures caused by bridges and opens as well as fails caused by regular stuck-at faults.Abstract:
A new form of logic diagnosis is described that is suitable for diagnosing fails in combinational logic. It can diagnose defects that can affect arbitrarily many elements in the integrated circuit. It operates by first identifying patterns during which only one element is affected by the defect, and then diagnosing the fails observed during the application of such patterns, one pattern at a time. Single stuck-at faults are used for this purpose, and the aggregate of stuck-at fault locations thus identified is then further analyzed to obtain the most accurate estimate of the identities of those elements that can be affected by the defect. This approach to logic diagnosis is as effective as that of classical stuck-at fault-based diagnosis, when the latter applies, but is far more general. In particular, it can diagnose fails caused by bridges and opens as well as fails caused by regular stuck-at faults.read more
Citations
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VLSI Test Principles and Architectures: Design for Testability (Systems on Silicon)
TL;DR: This book is a comprehensive guide to new DFT methods that will show the readers how to design a testable and quality product, drive down test cost, improve product quality and yield, and speed up time-to-market and time- to-volume.
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VLSI Test Principles and Architectures: Design for Testability
TL;DR: A comprehensive guide to new DFT methods that will show the readers how to design a testable and quality product, drive down test cost, improve product quality and yield, and speed up time to market and time-to-volume as mentioned in this paper.
Journal ArticleDOI
Fault diagnosis and logic debugging using Boolean satisfiability
TL;DR: This work proposes a novel Boolean satisfiability-based method for multiple-fault diagnosis and multiple-design-error diagnosis in combinational and sequential circuits and suggests that satisfiability captures significant characteristics of the problem of diagnosis.
Proceedings ArticleDOI
A Logic Diagnosis Methodology for Improved Localization and Extraction of Accurate Defect Behavior
TL;DR: Results from several simulated and over 800 failing ICs reveal a significant improvement in localization and an accurate model of the logic-level defect behavior that provides useful insight into the actual defect mechanism.
Proceedings ArticleDOI
Adaptive Debug and Diagnosis without Fault Dictionaries
S. Hoist,Hans-Joachim Wunderlich +1 more
TL;DR: A method is presented, which identifies possible faulty regions in a combinational circuit, based on its input/output behavior and independent of a fault model, and shows the effectiveness of the approach through experiments with benchmark and industrial circuits.
References
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Digital Systems Testing and Testable Design
TL;DR: The new edition of Breuer-Friedman's Diagnosis and Reliable Design ofDigital Systems offers comprehensive and state-ofthe-art treatment of both testing and testable design.
Book
Multivariate Analysis: Methods and Applications
TL;DR: Several aspects of multivariate analysis can be found in this paper, e.g., principal components analysis, factor analysis, multiple discriminant analysis, Linear Structural Relations (LISREL), Latent Structure Analysis.
Journal ArticleDOI
Failure diagnosis of structured VLSI
J.A. Waicukauski,E. Lindbloom +1 more
TL;DR: The authors describe a method for diagnosing the failures observed in testing VLSI designs that use the scan-path structure by simulating selected faults after testing using a fault simulator that allows the application of several patterns in parallel.
Proceedings ArticleDOI
Diagnosing combinational logic designs using the single location at-a-time (SLAT) paradigm
TL;DR: A new way of diagnosing ICs that fail logic tests is described, which can handle bridging fault, opens, transition faults and many more complex defects as easily and as accurately as regular stuck-at faults.