Open AccessBook
VLSI Test Principles and Architectures: Design for Testability (Systems on Silicon)
TLDR
This book is a comprehensive guide to new DFT methods that will show the readers how to design a testable and quality product, drive down test cost, improve product quality and yield, and speed up time-to-market and time- to-volume.About:
The article was published on 2006-07-01 and is currently open access. It has received 522 citations till now. The article focuses on the topics: Design for testing.read more
Citations
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Journal ArticleDOI
Survey of Test Vector Compression Techniques
TL;DR: This article summarizes and categories hardware-based test vector compression techniques for scan architectures, which fall broadly into three categories: code-based schemes use data compression codes to encode test cubes; linear-decompression- based schemes decompress the data using only linear operations; and broadcast-scan-based scheme rely on broadcasting the same values to multiple scan chains.
Proceedings ArticleDOI
Survey of low power testing of VLSI circuits
P. Basker,A. Arulmurugan +1 more
TL;DR: Low power dissipation during test application is becoming increasingly important in today's V LSI systems design and is a major goal in the future development of VLSI design.
Book
Electronic Design Automation: Synthesis, Verification, and Test
TL;DR: EDA/VLSI practitioners and researchers in need of fluency in an "adjacent" field will find this an invaluable reference to the basic EDA concepts, principles, data structures, algorithms, and architectures for the design, verification, and test of VLSI circuits.
Journal ArticleDOI
Algorithms for State Restoration and Trace-Signal Selection for Data Acquisition in Silicon Debug
Ho Fai Ko,Nicola Nicolici +1 more
TL;DR: This paper presents accelerated algorithms for restoring circuit state elements from the traces collected during a debug session, by exploiting bitwise parallelism and introduces new metrics that guide the automated selection of trace signals, which can enhance the real-time observability during in-system debug.
Book
System-on-Chip Test Architectures: Nanometer Design for Testability
TL;DR: This book is a comprehensive guide to new VLSI Testing and Design-for-Testability techniques that will allow students, researchers, DFT practitioners, and V LSI designers to master quickly System-on-Chip Test architectures, for test debug and diagnosis of digital, memory, and analog/mixed-signal designs.
References
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Journal ArticleDOI
Cramming More Components Onto Integrated Circuits
TL;DR: Integrated circuits will lead to such wonders as home computers or at least terminals connected to a central computer, automatic controls for automobiles, and personal portable communications equipment as mentioned in this paper. But the biggest potential lies in the production of large systems.
Journal ArticleDOI
A Method for the Construction of Minimum-Redundancy Codes
TL;DR: A minimum-redundancy code is one constructed in such a way that the average number of coding digits per message is minimized.
Journal ArticleDOI
Statistical mechanics of cellular automata
TL;DR: Analysis is given of ''elementary'' cellular automata consisting of a sequence of sites with values 0 or 1 on a line, with each site evolving deterministically in discrete time steps according to p definite rules involving the values of its nearest neighbors.
Book
Digital Systems Testing and Testable Design
TL;DR: The new edition of Breuer-Friedman's Diagnosis and Reliable Design ofDigital Systems offers comprehensive and state-ofthe-art treatment of both testing and testable design.